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EP3SL110F1152C2N Datasheet, PDF (281/341 Pages) Altera Corporation – Stratix III Device Handbook, | |||
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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1â271
Table 1â124. EP3SE110 Row Pins Output Timing Parameters (Part 5 of 5)
I/O
Standard
4mA
1.2-V
HSTL
CLASS I 6mA
8mA
3.0-V PCI â
3.0-V
PCI-X
â
Clock
GCLK tco
GCLK
PLL
tco
GCLK tco
GCLK
PLL
tco
GCLK tco
GCLK
PLL
tco
GCLK tco
GCLK
PLL
tco
GCLK tco
GCLK
PLL
tco
Fast Model
Industrial Commercial
C2
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL= VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL= VCCL=
1.1 V 0.9 V
Units
3.053
3.287 4.661 5.057 5.585 5.428 5.728 5.174 5.705 5.574 5.805 ns
1.255
1.430 1.847 1.936 2.137 2.157 2.162 2.035 2.239 2.258 2.150 ns
3.044
3.279 4.650 5.045 5.576 5.416 5.719 5.163 5.696 5.565 5.796 ns
1.243
1.418 1.836 1.924 2.125 2.145 2.150 2.024 2.228 2.247 2.139 ns
3.043
3.279 4.654 5.050 5.585 5.422 5.728 5.169 5.706 5.575 5.806 ns
1.241
1.416 1.840 1.929 2.131 2.151 2.156 2.030 2.235 2.254 2.146 ns
3.163
3.401 4.709 5.091 5.611 5.451 5.758 5.213 5.734 5.603 5.837 ns
1.354
1.570 1.920 1.997 2.156 2.167 2.156 2.061 2.263 2.282 2.149 ns
3.163
3.401 4.709 5.091 5.611 5.451 5.758 5.213 5.734 5.603 5.837 ns
1.354
1.570 1.920 1.997 2.156 2.167 2.156 2.061 2.263 2.282 2.149 ns
Table 1â125 through Table 1â128 list the maximum I/O timing parameters for
EP3SE110 devices for differential I/O standards.
Table 1â125 lists the EP3SE110 column pins input timing parameters for differential
I/O standards.
Table 1â125. EP3SE110 Column Pins Input Timing Parameters (Part 1 of 3)
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
I/O Standard Clock
Industrial Commercial
VCCL=
1.1 V
VCCL=
1.1 V
VCCL=
1.1 V
VCCL=
1.1 V
VCCL=
0.9 V
VCCL=
1.1 V
VCCL=
1.1 V
VCCL=
1.1 V
VCCL= Units
0.9 V
LVDS
tsu
GCLK
th
GCLK tsu
PLL th
tsu
MINI-LVDS
th
GCLK
tsu
GCLK th
PLL tsu
RSDS
th
tsu
GCLK
th
tsu
DIFFERENTIAL
1.2-V HSTL
GCLK
th
CLASS I
GCLK tsu
PLL th
-0.997
1.133
0.960
-0.691
-0.997
1.133
0.960
-0.691
-0.997
1.133
0.960
-0.691
-0.813
0.942
1.144
-0.882
-1.029
1.184
0.994
-0.701
-1.029
1.184
0.994
-0.701
-1.029
1.184
0.994
-0.701
-0.852
0.999
1.171
-0.886
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.258 -1.368 -1.483 -1.423 -1.794 -1.368 -1.482 -1.428 -1.837 ns
1.460 1.595 1.731 1.659 2.031 1.604 1.739 1.674 2.075 ns
1.802 2.025 2.242 2.134 2.045 2.042 2.260 2.147 2.091 ns
-1.383 -1.555 -1.721 -1.641 -1.544 -1.563 -1.729 -1.645 -1.588 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2
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