AK4950 Datasheet, PDF (99/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP

[AK4950]
■ Stereo Line Output
DVOL7-0 bits
(Addr:2AH)
Digital Filter Path
(Addr:2CH)
DACL bit
(Addr:04H, D16)
LOPS bit
(Addr:04H, D22)
PMDAC bit
(Addr:00H, D18)
PMLO bit
(Addr:00H, D19)
LOUT pin
ROUT pin
XXH
(1)
XXH
(2)
C1H
17H
(3)
(5)
(6)
(8)
(4)
(7)
>300 ms
>300 ms
Normal Output
Figure 73. Stereo Lineout Sequence
Example:
PLL, Master Mode
Audio I/F Format :MSB justified
Sampling Frequency:48KHz
Digital Volume 2: 0dB
Programmable Filter OFF
(1) Addr:2AH, Data:C1H
(2) Addr:2CH, Data:17H
(3) Addr:04H, Data:41H
(4) Addr:00H, Data0C:H
(5) Addr:04H, Data:01CH
Playback
(6) Addr:04H, Data:41H
(7) Addr:00H, Data:00H
(8) Addr:04H, Data:00H
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up output digital volume 2 (Addr = 2AH)
(2) Set up Programmable Filter Path (PFDAC, ADCPF and PFSDO bits). (Addr = 2CH)
(3) Set up the path of “DAC → Stereo Lime-Amp”: DACL bit = “0” → “1” (Addr = 04H)
Set stereo lime amp to power save mode. LOPS bit = “0” → “1”
(4) Power up DAC and Stereo Line-Amp: PMDAC = PMLO bits = “0” → “1” (Addr = 00H)
LOUT and ROUT pins rise up to VCOM voltage after PMLO bit is changed to “1”. Rise time is 300ms(max.)
at C=1μF and AVDD=1.8V.
(5) Exit power-save mode of Stereo Line-Amp: LOPS bit = “1” → “0” (Addr=04H)
LOPS bit should be set to “0” after LOUT and ROUT pins rise up. Stereo Line-Amp goes to normal
operation by setting LOPS bit to “0”.
(6) Enter power save mode of Stereo Line-Amp: LOPS bit = “0” → “1” (Addr = 04H)
(7) Power down DAC and Stereo Line-Amp: PMDAC=PMLO= “1” → “0”. (Addr=00H)
LOUT and ROUT pins fall down to VSS1. Fall time is 300ms (max.) at C=1μF and AVDD=1.8V.
(8) Disable the path of “DAC → Stereo Line-Amp”: DACL bit = “1” → “0” (Addr=04H)
Exit power-save mode of the Stereo-Line Amp: LOPS bit = “1” → “0”
LOPS bit should be set to “0” after LOUT and ROUT pins fall down.
MS1320-E-00
- 99 -
2011/10