AK4950 Datasheet, PDF (35/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP

[AK4950]
■ MIC Sensitivity Compensation
The AK4950 has microphone sensitivity (Inter-channel gain mismatch) compensation function controlled by
MSGAINL3-0 bits (Lch) and MSGAINR3-0 bits (Rch)
MSGAINL3-0 bits
MSGAINR3-0 bits
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
GAIN (dB)
+5.25
+4.50
+3.75
+3.00
+2.25
+1.50
+0.75
0
–0.75
–1.50
Step
(default)
0.75dB
1101
–2.25
1100
–3.00
1011
–3.75
1010
–4.50
1001
–5.25
1000
–6.00
Table 22. MIC Sensitivity Compensation
MIC sensitivity compensation gain can be written directly to the DSP by setting 01H and 02H (in 3-wire mode) or 81H
and 82H (in I²C mode) without setting MAGAINL/R3-0 bits. In this case, the gain can be set in a step less than 0.1dB.
The target gain is Y[dB],
X=10^(Y[dB]/20) x 2²⁰ (Y[dB] ≤ +18dB)
Available Gain Setting Range: -∞ ≤ Gain < +18dB (The coefficient has a 20-bit accuracy)
Round X off to the closest whole number and convert it to two’s complement.
MSB of the MIC sensitivity compensation register is a sign bit.
E.g.) MIC sensitivity compensation value = -3.0[dB]
X = 10^(-3/20) x 2²⁰ = 742335
742335(dec) = 0B53BE(hex): Register value to be written
The following is an access sequence to Register Map 2.
Sequence Example (3-wire Mode):
1. PMPFIL bit = “0”
2. INIT bit = “1”
3. COEW bit = “1”
4. Addr=01H, Data=xxxxxxH(24bit Data); Lch MIC Sensitivity Compensation Value
5. Addr=02H, Data=xxxxxxH(24bit Data); Rch MIC Sensitivity Compensation Value
6. COEW bit = “0”
7. PMPFIL bit = “1”; Programmable Block Power Up
(Note) When accessing to the DSP directly on the address 01H, 02H (in 3-wire mode) or 81H, 82H (in I²C mode), do not
access to MSGAINL/R3-0 bits of the address 2BH.
MS1320-E-00
- 35 -
2011/10