AK4950 Datasheet, PDF (73/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP

[AK4950]
SDA
SCL
S
start condition
P
stop condition
Figure 62. Start Condition and Stop Condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 63. Acknowledge (I²C Bus)
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 64. Bit Transfer (I²C Bus)
MS1320-E-00
- 73 -
2011/10