AK4950 Datasheet, PDF (18/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP

■ Timing Diagram
MCKI
LRCK
MCKO
1/fCLK
VIH
VIL
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
1/fMCK
50%TVDD
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
tMCKL
50%TVDD
dMCK = tMCKL x fMCK x 100
Note 33. MCKO is not available at EXT Master mode.
Figure 4. Clock Timing (PLL/EXT Master mode)
[AK4950]
LRCK
50%TVDD
BICK
tBLR
tDLR
tBCKL
tBSD
50%TVDD
SDTO
50%TVDD
SDTI
tSDS
tSDH
VIH
VIL
Figure 5. Audio Interface Timing (PLL/EXT Master mode)
MS1320-E-00
- 18 -
2011/10