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AK4950 Datasheet, PDF (25/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP
[AK4950]
■ PLL Mode
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) circuit generates a clock that is selected by the
PLL3-0 and FS3-0 bits. The PLL lock times, when the AK4950 is supplied stable clocks after PLL is powered-up
(PMPLL bit = “0” → “1”) or the sampling frequency is changed, are shown in Table 4.
1) PLL Mode Setting
Mode
PLL3
bit
PLL2
bit
PLL1
bit
PLL0
bit
PLL Reference
Clock Input Pin
Input
Frequency
PLL Lock Time
(max)
2
0
0
1
0
BICK pin
32fs
2 ms
3
0
0
1
1
BICK pin
64fs
2 ms
4
0
1
0
0
MCKI pin
11.2896MHz
10 ms
6
0
1
1
0
MCKI pin
12MHz
10 ms
7
0
1
1
1
MCKI pin
24MHz
10 ms
12
1
1
0
0
MCKI pin
13.5MHz
10 ms
13
1
1
0
1
MCKI pin
27MHz
10 ms
Others
Others
N/A
Note 36. The resistor tolerance is ±5% and the capacitor tolerance is ±30%.
Table 4. PLL Mode Setting (*fs: Sampling Frequency, N/A: Not Available)
(default)
2) Setting of sampling frequency in PLL Mode
When PLL2 bit is “1” (PLL reference clock input is MCKI pin), the sampling frequency is selected by FS3-0 bits as
defined in Table 5.
Mode
FS3 bit
FS2 bit
FS1 bit
FS0 bit Sampling Frequency
0
0
0
0
0
8kHz
1
0
0
0
1
12kHz
2
0
0
1
0
16kHz
3
0
0
1
1
24kHz
5
0
1
0
1
11.025kHz
7
0
1
1
1
22.05kHz
10
1
0
1
0
32kHz
11
1
0
1
1
48kHz
15
1
1
1
1
44.1kHz
(default)
Others
Others
N/A
Table 5. Setting of Sampling Frequency at PLL2 bit = “1” and PMPLL bit = “1”
(Reference Clock = MCKI pin), (N/A: Not Available)
When PLL2 bit is “0” (PLL reference clock input pin is the BICK pin), the sampling frequency is selected by FS1-0 bits.
(Table 6). * Since the default setting of FS3-0 bits is “1111” (Not Available), FS3-0 bits must be set when PLL2 bit = “0”.
Mode FS3 bit FS2 bit
FS1 bit
FS0 bit
Sampling Frequency
Range
0
0
0
x
x
7.35kHz ≤ fs ≤ 12kHz
1
0
1
x
x
12kHz < fs ≤ 24kHz
2
1
0
x
x
24kHz < fs ≤ 48kHz
Others
Others
N/A
(default)
Table 6. Setting of Sampling Frequency at PLL2 bit = “0” and PMPLL bit = “1” PLL Slave Mode 2
(PLL Reference Clock: BICK pin), (x: Don’t care, N/A: Not Available)
MS1320-E-00
- 25 -
2011/10