AK4950 Datasheet, PDF (37/106 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP & mini DSP

[AK4950]
■ Digital MIC
1. Connection to Digital Microphones
When DMIC bit is set to “1”, the LIN1 and RIN1 pins become DMDAT (digital microphone data input) and DMCLK
(digital microphone clock supply) pins respectively. The same voltage as AVDD must be provided to the digital
microphone. The Figure 28 and Figure 29 show stereo/mono connection examples. The DMCLK clock is input to a
digital microphone from the AK4950. The digital microphone outputs 1bit data, which is generated by ΔΣModulator
using DMCLK clock, to the DMDAT pin. PMDML/R bits control power up/down of the digital block (Decimation Filter
and Digital Filter). PMADL/PMADR bits settings do not affect the digital microphone power management. The DCLKE
bit controls ON/OFF of the output clock from the DMCLK pin. When the AK4950 is powered down (PDN pin= “L”), the
DMCLK and DMDAT pins become floating state. Pull-down resistors must be connected to the DMCLK and DMDAT
pins externally to avoid this floating state.
AVDD
AK4950
VDD
AMP
ΔΣ
Modulator
Lch
VDD
DMCLK(64fs)
100kΩ
PLL
DMDAT
R
Decimation _HPF1
Filter
P rogram mab le
Filter
ALC
MCKI
SDTO
AMP
ΔΣ
Modulat or
Rch
AVDD
Figure 28. Connection Example of Stereo Digital MIC
AK4950
VDD
AMP
ΔΣ
Modulator
DMCLK(64fs)
100kΩ
DMDAT
R
PLL
Decimation _HPF1
Filter
P rogram mab le
Filter
ALC
MCKI
SDTO
Figure 29. Connection Example of Mono Digital MIC
MS1320-E-00
- 37 -
2011/10