AK4953A Datasheet, PDF (86/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4953A]
■Digital MIC Input Recording (Stereo)
FS3-0 bits ₀₀₀₀
(Addr:06H, D3-0)
(1)
Timer Select
(Addr:09H, D7-6 00, 00H
Addr:0AH,)
(2)
1101
00, 70H
ALC Control 2
(Addr:0CH )
IVL7-0 bits
(Addr:0FH)
ALC Control 3
(Addr:0DH, D7-6)
ALC Control 1
(Addr:0BH)
Digital Filter Path
(Addr:1DH)
Filter Co-ef
(Addr:1CH, 1E-25H
32-4FH)
Filter Select
(Addr:1CH, 30H)
00H
(3)
E1H
(4)
00
(5)
00H
03H
XX....X
XX....X
(6)
(7)
(8)
(9)
E1H
E1H
00
A1H
03H
XX....X
XX....X
ALC1 State
ALC1 Disable
ALC1 Enable
00H
(14)
ALC1 Disable
PMPFIL bit
(Addr:00H, D7)
Digital MIC
(Addr:08H)
SDTO pin
State
0000 X 0 XX
(10)
(13)
0011 X 0 XX
0000 X 0 XX
(11) ^1059/fs
(12)
0 data output
Normal
data ouput ^{0 data output}
Figure 57. Digital MIC Input Recording Sequence
Example:
PLL Master Mode
Audio I/F Format: MSB justified
Sampling Frequency: 44.1kHz
Digital MIC setting:
D ata is latched on the DMCLK failing edge
ALC1 setting: Refer to Table 35
HPF1: fc=108.8Hz, ADRST1-0 bits = “00”
Programmable Filter OFF
(1) Addr:06H, Data:0DH
(2) Addr:09H, Data:00H
Addr:0AH, Data:70H
(3) Addr:0CH, Data:E1H
(4) Addr:0FH, Data:E1H
(5) Addr:0DH, Data:00H
(6) Addr:0BH, Data:A1H
(7) Addr:1DH, Data:03H
(8) Addr:1CH, Data:04H
(9) Addr:1CH, Data:05H
(10) Addr:00H, Data:C0H
(11) Addr:08H, Data:3BH
Recording
(12) Addr:08H, Data:0BH
(13) Addr:00H, Data:40H
(14) Addr:0BH, Data:00H
<Example>
This sequence is an example of ALC1 setting at fs=44.1kHz. For changing the parameter of ALC, please refer to
“Registers Set-up Sequence at ALC1 Operation (recording path)”.
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4953A is PLL mode, Digital MIC of (11) and
Programmable Filter of (10) must be powered-up in consideration of PLL lock time after a sampling frequency
is changed.
(2) Set up ALC1 Timer and ADRST1-0 bits (Addr = 09H, 0AH)
(3) Set up IREF value for ALC1 (Addtr = 0CH)
(4) Set up IVOL value at ALC1 operation start (Addr = 0FH)
(5) Set up RGAIN1-0 bits (Addr =0DH)
(6) Set up LMTH1-0, LMAT1-0, ZELMN, ALC1, LFST bits (Addr = 0BH)
(7) Set up Programmable Filter Path: PFSDO bit = ADCPF bit = “1” (Addr = 1DH)
(8) Set up Coefficient of Programmable Filter (Addr: 1CH, 1EH ~ 25H, 32H ~ 4FH)
(9) Set up Programmable Filter ON/OFF
(10) Power Up Programmable Filter: PMPFIL bit = “0” → “1”
(11) Set up & Power Up Digital MIC: PMDMR = PMDML bits = “0” →“1”
The initialization cycle time of ADC is 1059/fs=24ms @ fs=44.1kHz, .ADRST1-0 bit = “00”. ADC outputs “0”
data during initialization cycle. After the ALC1 bit is set to “1”, the ALC1 operation starts from IVOL value of
(5).
(12) Power Down Digital MIC: PMDMR =PMDML bits = “1” → “0”
(13) Power Down Programmable Filter: PMPFIL bit = “1” → “0”
(14) ALC1 Disable: ALC1 bit = “1” → “0”
MS1252-E-00
- 86 -
2010/10