AK4953A Datasheet, PDF (32/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4953A]
■ Audio Interface Format
Four types of data formats are available and selected by setting the DIF1-0 bits (Table 18). In all modes, the serial data is
MSB first, 2’s complement format. Audio interface formats can be used in both master and slave modes. LRCK and BICK
are output from the AK4953A in master mode, but must be input to the AK4953A in slave mode. The SDTO is clocked
out on the falling edge (“↓”) of BICK and the SDTI is latched on the rising edge (“↑”) of BICK.
Mode
0
1
2
3
DIF1 bit
0
0
1
1
DIF0 bit
0
1
0
1
SDTO (ADC)
24bit MSB justified
24bit MSB justified
24bit MSB justified
I²S Compatible
SDTI (DAC)
24bit LSB justified
16bit LSB justified
24bit MSB justified
I²S Compatible
Table 18. Audio Interface Format
BICK
≥ 48fs
≥ 32fs
≥ 48fs
=32fs or
≥ 48fs
Figure
Figure 21
Figure 22
Figure 23
(default)
Figure 24
If 24-bit (16-bit) data, the output of ADC, is converted to 8-bit data by removing LSB 16-bit (8-bit), “−1” at 24-bit (16bit)
data is converted to “−1” at 8-bit data. And when the DAC playbacks this 8-bit data, “−1” at 8-bit data will be converted
to “−65536” at 24-bit (“−256” at 16-bit) data which is a large offset. This offset can be removed by adding the offset of
“32768” at 24-bit (“128” at 16-bit) to 24-bit (16-bit) data before converting to 8-bit data.
LRCK
01 2
BICK(64fs)
8 9 10
20 21
SDTO(o)
23 22
16 15 14
0
31 0 1 2
8 9 10
20 21
23 22
16 15 14
0
31 0 1
23
SDTI(i)
Don’t Care 23 22
12 11
1 0 Don’t Care
23:MSB, 0:LSB
Lch Data
Figure 21. Mode 0 Timing
23 22
12 11
Rch Data
10
LRCK
0 1 2 3 7 8 9 10 12 13 14 15 0 1 2 3 8 9 10 11 12 13 14 15 0 1
BICK(32fs)
SDTO(o)
23 22 21
15 14 13 12 11 10 9 8 23 22 21
15 14 13 12 11 10 9 8 23
SDTI(i)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
7 6 5 4 3 2 1 0 15
BICK(64fs)
0 1 2 3 15 16 17 18 23 24 30 31 0
12
3 15 16 17 18 23 24 25 30
31 1
SDTO(o)
23 22 21
87 6 5 0
23 22 21
87 6 5 0
23
SDTI(i)
Don’t Care
15 14 13 8 2 1 0 Don’t Care
24bit: 23:MSB, 0:LSB
16bit: 15: MSB, 0:LSB
Lch Data
15 14 13 8 2 1 0
Rch Data
Figure 22. Mode 1 Timing
MS1252-E-00
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2010/10