AK4953A Datasheet, PDF (61/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4953A]
SDA
SCL
S
start condition
P
stop condition
Figure 47. Start Condition and Stop Condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 48. Acknowledge (I²C Bus)
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 49. Bit Transfer (I²C Bus)
MS1252-E-00
- 61 -
2010/10