AK4953A Datasheet, PDF (84/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4953A]
5. EXT Master Mode
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
MCKI pin
M/S bit
(Addr:01H, D3)
LRCK pin
BICK pin
(1)
(5)
(2) ⁽³⁾
(4)
Example:
Audio I/F Format: MSB justified (ADC and DAC)
Input MCKI frequency: 256fs
Sampling Frequency: 44.1kHz
BCKO: 64fs
(1) Power Supply & PDN pin = “L” Æ “H”
(2) Dummy command
(3) MCKI input
(4)Addr:05H, Data:0AH
Addr:06H, Data:02H
Input
Addr:01H, Data:08H
Output
BICK and LRCK output
(5) Addr:00H, Data:40H
Figure 55. Clock Set Up Sequence (5)
<Example>
(1) After Power Up: PDN pin “L” → “H”
“L” time of 150ns or more is needed to reset the AK4953A.
(2) Dummy Command must be input during this period.
(3) MCKI is supplied.
(4) After DIF1-0, BCKO, FS3-0 and DS bits are set. M/S bit should be set to “1”. Then LRCK and BICK are output.
(5) Power Up VCOM and Regulator: PMVCM bit = “0” → “1”
VCOM and Regulator must first be powered-up before the other block operates.
MS1252-E-00
- 84 -
2010/10