English
Language : 

AK4953A Datasheet, PDF (24/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP
[AK4953A]
OPERATION OVERVIEW
■ System Clock
There are the following five clock modes to interface with external devices (Table 2, Table 3).
Mode
PMPLL bit
M/S bit
PLL3-0 bits
Figure
PLL Master Mode (Note 39)
1
1
Table 5
Figure 14
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
1
0
Table 5
Figure 15
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK
1
0
Table 5
Figure 16
pin)
EXT Slave Mode
0
0
x
Figure 17
EXT Master Mode
0
1
x
Figure 18
Note 39. If M/S bit = “1”, PMPLL bit = “0” and MCKO bit = “1” during the setting of PLL Master Mode, the invalid
clocks are output from the MCKO pin.
Table 2. Clock Mode Setting (x: Don’t care)
Mode
MCKO bit MCKO pin MCKI pin BICK pin LRCK pin
PLL Master Mode
0
1
L
Selected by
PS1-0 bits
Selected by
PLL3-0 bits
Output
(Selected by
BCKO bit)
Output
(1fs)
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
0
1
L
Selected by
PS1-0 bits
Selected by
PLL3-0 bits
Input
(≥ 32fs)
Input
(1fs)
PLL Slave Mode
(PLL Reference Clock: BICK pin)
0
L
GND
Input
(Selected by
PLL3-0 bits)
Input
(1fs)
EXT Slave Mode
0
L
Selected by
FS3-0 bits
Input
(≥ 32fs)
Input
(1fs)
EXT Master Mode
0
L
Selected by
FS3-0 bits
Output
(Selected by
BCKO bit)
Output
(1fs)
Note 40. When PMVCM bit = M/S bit = “1” and MCKI is input, LRCK and BICK are output, even if PMDAC bit =
PMADL bit = PMADR bit = “0”.
Table 3. Clock pins state in Clock Mode
■ Master Mode/Slave Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4953A is in power-down mode (PDN pin = “L”) and when exits reset state, the AK44953 is in slave mode. After
exiting reset state, the AK4953A goes to master mode by changing M/S bit = “1”.
When the AK4953A is in master mode, the LRCK and BICK pins are a floating state until M/S bit becomes “1”. The
LRCK and BICK pins of the AK4953A must be pulled-down or pulled-up by the resistor (about 100kΩ) externally to
avoid the floating state.
M/S bit
Mode
0
Slave Mode
1
Master Mode
Table 4. Select Master/Slave Mode
(default)
MS1252-E-00
- 24 -
2010/10