AK4953A Datasheet, PDF (64/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4953A]
■ Register Definitions
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Power Management 1 PMPFIL PMVCM PMBP PMSPK LSV PMDAC PMADR PMADL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
PMADL: MIC-Amp Lch and ADC Lch Power Management
0: Power-down (default)
1: Power-up
When the PMADL or PMADR bit is changed from “0” to “1”, the initialization cycle (1059/fs=24ms
@44.1kHz, ADRST1-0 bits = “00”) starts. After initializing, digital data of the ADC is output.
PMADR: MIC-Amp Rch, ADC Rch Power Management
0: Power down (default)
1: Power up
When the PMADL or PMADR bit is changed from “0” to “1”, the initialization cycle (1059/fs=24ms
@44.1kHz, ADRST1-0 bits = “00”) starts. After initializing, digital data of the ADC is output.
PMDAC: DAC Power Management
0: Power-down (default)
1: Power-up
LSV: Low Voltage Operation Mode of the Speaker Amplifier
0: Normal mode: SVDD=1.8V ~ 5.5V (default)
1: Low voltage mode: SVDD=0.9V ~ 2.0V
PMSPK: Speaker-Amp Power Management
0: Power-down (default)
1: Power-up
PMBP: BEEP Generating Circuit Power Management
0: Power-down (default)
1: Power-up
PMVCM: VCOM, Regulator (2.5V) Power Management
0: Power-down (default)
1: Power-up
PMPFIL: Programmable Filter Block (HPF2/LPF/5 Band EQ/ALC) Power Management
0: Power down (default)
1: Power up
All blocks can be powered-down by writing “0” to the address “00H”, PMPLL, PMMP, PMHPL, PMHPR,
PMDML, PMDMR and MCKO bits. In this case, register values are maintained.
PMVCM bit must be “1” when one of bocks is powered-up. PMVCM bit can only be “0” when the address “00H”
and all power management bits (PMPLL, PMMP, PMHPL, PMHPR, PMDML, PMDMR and MCKO) are “0”.
MS1252-E-00
- 64 -
2010/10