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AK5701KN_17 Datasheet, PDF (63/64 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP内蔵16-Bit Stereo ADC | |||
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[AK5701]
æ¹è¨å±¥æ´
Date (YY/MM/DD) Revision
05/08/04
00
05/11/22
01
Reason
åç
誤è¨è¨æ£
07/08/30
02
製å追å
ä»æ§è¿½å
誤è¨è¨æ£
ä»æ§è¿½å
13/02/22
15/10/30
03
ã³ã¡ã³ã追å
04
ä»æ§å¤æ´
Page Contents
8
25
35
57
1,3,5,62
11
30
31
40
1
62, 63
ã¹ã¤ããã³ã°ç¹æ§ (PLL Slave Mode)
tBCKL(min): 240ns ï 0.4 x tBCK
tBCKH(min): 240ns ï 0.4 x tBCK
PLL Slave Mode
a) Mode 1: EXBCLK or EXLRCK ï MCKI
b) Mode 2: MCKI ï EXBCLK or EXLRCK
ALCåä½
ä¸è¨ä¸æåé¤ã
ããã®ã¨ãIVL, IVRå¤ã®å¤æ´ã¯L/Rå
±éã§è¡
ããã¾ããã
ã³ã³ããã¼ã«ã·ã¼ã±ã³ã¹ (ãã¤ã¯é²é³)
Figure 51 (7) Data=01H ï 04H
(2) 72H&73H ï 12H&13H
(3) 7AH ï 1AH
(4) 7BH ï 1BH
(5) 7CH ï 1CH
AK5701KN ã追å
(1) Ambient Temperature
AK5701VN : ï30 ï¾ +85ï°C
AK5701KN : ï40 ï¾ +85ï°C
(2) Marking
AK5701VN : â5701â
AK5701KN : â5701Kâ
1. Control Interface Timing(CSP pin = âLâ)
(1) CSN âï¯â to CCLK âïâ
â CSN Edge to CCLK âïâ
(2) CCLK âïâ to CSN âïâ
â CCLK âïâ to CSN Edge
2. Control Interface Timing(CSP pin = âHâ)
(1) CSN âïâ to CCLK âïâ
â CSN Edge to CCLK âïâ
(2) CCLK âïâ to CSN âï¯â
â CCLK âïâ to CSN Edge
3. Note 22 ã追å
Figure 26 ï¾ Figure 29
ECTBCLK(32fs)/BCLK(32fs) ã® æ左端㮠No
15 â 31
Figure 30 ï¾ Figure 33
BCLK(64fs) ã® æ左端㮠No
15 â 31
Serial Control I/F
1. CSP pin = âLâ
â1ã¢ãã¬ã¹ã¸ã®æ¸ãè¾¼ã¿æ¯ã«CSNãä¸åº¦ âHâ
ã«ãã¦ãã ãããâ ã追å
2. CSP pin = âHâ
â1ã¢ãã¬ã¹ã¸ã®æ¸ãè¾¼ã¿æ¯ã«CSNãä¸åº¦ âLâ
ã«ãã¦ãã ãããâ ã追å .
â12. AEC-Q100 Qualified (AK5701KN)â 追å
ããã±ã¼ã¸ããã¼ãã³ã°
ããã±ã¼ã¸å³ã®å¯¸æ³ããã¼ãã³ã°å¤æ´
MS0404-J-04
- 63 -
2015/10
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