AK5701KN_17 Datasheet, PDF (15/64 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP内蔵16-Bit Stereo ADC

[AK5701]
MCKI
EXLRCK
EXBCLK
1/fCLK
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
tBCKH
tBCKL
fMCK
VIH
VIL
VIH
VIL
Duty = tLRCKH x fs x 100
= tLRCKL x fs x 100
VIH
VIL
MCKO
50%DVDD
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 8. Clock Timing (PLL Slave mode; PLL Reference Clock = MCKI pin & Except DSP mode)
tLRCKH
VIH
EXLRCK
VIL
tLRB
VIH
EXBCLK
VIL
(BCKP = "0")
VIH
EXBCLK
(BCKP = "1")
VIL
tBSD
SDTO
MSB
50%DVDD
Figure 9. Audio Interface Timing (PLL Slave mode & DSP mode; MSBS = 0)
MS0404-J-04
- 15 -
2015/10