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AK5701KN_17 Datasheet, PDF (11/64 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP内蔵16-Bit Stereo ADC | |||
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[AK5701]
Parameter
Symbol
Min.
Typ.
Max.
Unit
Control Interface Timing (CSP pin = âLâ)
CCLK Period
tCCK
142
-
-
ns
CCLK Pulse Width Low
tCCKL
56
-
-
ns
Pulse Width High
tCCKH
56
-
-
ns
CDTI Setup Time
tCDS
28
-
-
ns
CDTI Hold Time
CSN âHâ Time
tCDH
28
-
tCSW
150
-
-
ns
-
ns
CSN Edge to CCLK âïâ (Note 22)
tCSS
50
-
-
ns
CCLK âïâ to CSN Edge (Note 22)
tCSH
50
-
-
ns
Control Interface Timing (CSP pin = âHâ)
CCLK Period
tCCK
142
-
-
ns
CCLK Pulse Width Low
tCCKL
56
-
-
ns
Pulse Width High
tCCKH
56
-
-
ns
CDTI Setup Time
tCDS
28
-
-
ns
CDTI Hold Time
tCDH
28
-
-
ns
CSN âLâ Time
tCSW
150
-
-
ns
CSN Edge to CCLK âïâ (Note 22)
tCSS
50
-
-
ns
CCLK âïâ to CSN Edge (Note 22)
tCSH
50
-
-
ns
Power-down & Reset Timing
PDN Pulse Width (Note 23)
tPD
150
-
-
ns
PMADL or PMADR âïâ to SDTO valid (Note 24)
HPF1-0 bits = â00â
tPDV
-
3088
-
1/fs
HPF1-0 bits = â01â
HPF1-0 bits = â10â
tPDV
-
1552
-
1/fs
tPDV
-
784
-
1/fs
Note 22. ãã®è¦æ ¼ã¯CSNã®ã¨ãã¸ã¨CCLKã®CCLKã®âïâãéãªããªãããã«è¦å®ãã¦ãã¾ãã
Note 23. AK5701ã¯PDN pin = âLâã§ãªã»ããããã¾ãã
Note 24. PMADL bitã¾ãã¯PMADR bitãç«ã¡ä¸ãã¦ããã®LRCKã¯ããã¯ã® âïâã®åæ°ã§ãã
MS0404-J-04
- 11 -
2015/10
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