HMC704LP4E Datasheet, PDF (19/44 Pages) Hittite Microwave Corporation – 8 GHz fractionaL-N PLL

v04.0215
HMC704LP4E
8 GHZ FRACTIONAL-N PLL
Ref Path ’R’ Divider
The reference path “R” divider is based on a 14 bit counter and can divide input signals of up to 350 MHz input by values
from 1 to 16,383 and is controlled by “Reg 02h”[13:0]. The reference divider output may be viewed in test mode on the
LD_SDO pin, by setting “Reg 0Fh”[4:0] = 9d.
RF Path
The RF path is shown in Figure 28. This path features a low noise 8 GHz RF input buffer followed by an 8GHz RF divide-
by-2 with a selectable bypass. If the VCO input is below 4 GHz the RF divide-by-2 should be by-passed for reduced
power consumption and improved performance in fractional mode. The RF divide-by-2 is followed by the N divider, a 19
bit divider that can operate in either integer or fractional mode with up to 4 GHz inputs. Finally the N divider is followed
by the Phase Detector (PD), which has two inputs, the RF path from the VCO (V) and the reference path (R) from the
crystal. The PD can operate at speeds up to 80 MHz in fractional Mode A, 100 MHz in fractional Mode B and 115 MHz in
integer mode.
RF Input Stage
RF Buffer
8GHz
VCOIN
VCOIP
RF Divide by 2 N Divider Phase Detector Charge Pump
8GHz
4GHz
80MHz/100MHz Fractional
115MHz Integer
VPPCP
/2 or
Bypass
SEL
19 Bit /N
V
UP
CP
PD
CP
DN
CONTROL Ref Path ^R
Figure 28. RF Path
The RF input stage provides the path from the external VCO to the phase detector via the RF or ’N’ divider. The RF input
path is rated to operate up to 8 GHz across all conditions. The RF input stage is a differential common emitter stage with
internal DC bias, and is protected by ESD diodes as shown in Figure 29. This input is not matched to 50 Ohms. A 50
Ohm resistor placed across the inputs can be used if desired. In most applications the input is used single-ended into
either the VCOIP or VCOIN pin with the other input connected to ground through a DC blocking capacitor. The preferred
input level for best spectral performance is -10 dBm nominally.
Figure 29. RF Input Stage
5 - 19
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