HMC704LP4E Datasheet, PDF (17/44 Pages) Hittite Microwave Corporation – 8 GHz fractionaL-N PLL

v04.0215
HMC704LP4E
8 GHZ FRACTIONAL-N PLL
Integer
Boundary
f_VCO n = integer
d=0
m = 1 = 1st order
Δ < Loop Bandwidth
ΔΔ
1st Order Integer Boundary Spur
Integer
Boundary
nfpd
(n+1/2)fpd
(n+1)fpd
Integer
Boundary
d =1
n = integer
f_VCO
m = 2 = 2nd order
Δ < Loop Bandwidth
Integer
Boundary
2Δ 2Δ
2nd Order Spur
Δ
nfpd
(n+1/2)fpd
(n+1)fpd
Figure 26. Fractional Spurious Example
Characterization of the levels and orders of these products is not unlike a mixer spur chart. Exact levels of the products
are dependent upon isolation of the various PLL parts. Hittite can offer guidance about expected levels of spurious with
our PLL and VCO application boards. Regulators with high power supply rejection ratios (PSRR) are recommended,
especially in noisy applications.
When operating in fractional mode, charge pump and phase detector linearity is of paramount importance. Any non-
linearity degrades phase noise and spurious performance. Phase detector linearity degrades when the phase error is
very small and is operating back and forth between reference lead and VCO lead. To mitigate these non-linearities in
fractional mode it is critical to operate the phase detector with some finite phase offset such that either the reference or
VCO always leads. To provide a finite phase error, extra current sources can be enabled which provide a constant DC
current path to VDD (VCO leads always) or ground (reference leads always). These current sources are called charge
pump offset and they are controlled via “Reg 09h”. The time offset at the phase detector should be ~2.5 ns + 4T_ps, where
T_ps is the RF period at the fractional prescaler input in nanoseconds (ie. after the optional fixed divide by 2). The specific
level of charge pump offset current is determined by this time offset, the comparison frequency and the charge pump
current and can be calculated from:
( ) ( ) ^{Required CP Offset (µA) = 2.5 ×10−9 + 4T}_PS ^{(sec) × F}_comparison ^{(Hz) × I}_CP ^(µA)
(EQ 4)
CP Offset Current should never be more than 25% of the programmed CP current. Operation with charge pump offset
influences the required configuration of the Lock Detect function. Refer to the description of “PD Window Based Lock
Detect” later in this document. Note that this calculation can be performed for the center frequency of the VCO, and
does not need refinement for small differences (<25%) in center frequencies.
Another factor in the spectral performance in Fractional Mode is the choice of the Delta-Sigma Modulator mode. Mode
A can offer better in-band spectral performance (inside the loop bandwidth) while Mode B offers better out of band per-
formance. See “Reg 06h”[3:2] for DSM mode selection. Finally, all fractional PLLs cre­ate fractional spurs at some level.
Hittite offers the lowest level fractional spurious in the indus­try in an integrated solution.
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