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HMC704LP4E Datasheet, PDF (15/44 Pages) Hittite Microwave Corporation – 8 GHz fractionaL-N PLL
v04.0215
HMC704LP4E
8 GHZ FRACTIONAL-N PLL
PLL-VCO Noise
( ) Φ=2
min
Φ
2
p
,
Φν2
(EQ 3)
An example of the use of the FOM values to make a quick estimate of PLL performance: Estimate the phase noise of an
8GHz closed loop PLL with a 100MHz reference operating in Fractional Mode B with the VCO operating at 8 GHz and
the VCO divide by 2 port driving the PLL at 4GHz. Assume an HMC509 VCO has free running phase noise in the 1/f2
region at 1 MHz offset of -135 dBc/Hz and phase noise in the 1/f3 region at 1 kHz offset of -60 dBc/Hz.
Fv1_dB =
-135
Free Running VCO PN at 1MHz offset
+20*log10(1e6)
PNoise normalized to 1Hz offset
-20*log10(8e9)
Pnoise normalized to 1Hz carrier
= -213.1 dBc/Hz at 1Hz
VCO FOM
Fv3_dB =
-60
Free Running VCO PN at 1kHz offset
+30*log10(1e3)
PNoise normalized to 1 Hz offset
-20*log10(8e9)
Pnoise normalized to 1 Hz carrier
= -168 dBc/Hz at 1Hz
VCO Flicker FOM
We can see from Figure 3 and Figure 4 respectively that the PLL FOM floor and FOM flicker parameters in fractional
Mode A:
Fpo_dB = -227 dBc/Hz at 1Hz
Fp1_dB = -266 dBc/Hz at 1Hz
Each of the Figure of Merit equations result in straight lines on a log-frequency plot. We can see in the example below
the resulting
PLL floor at 8 GHz = Fpo_dB +20log10(fvco) -10log10(fpd) = -227+198 -80 = -109 dBc/Hz
PLL Flicker at 1 kHz = Fp1_dB+20log10(fvco)-10log10(fm) = -266 +198-30 = -98 dBc/Hz
VCO at 1 MHz = Fv1_dB+20log10(fvco)-20log10(fm)= -213 +198-120
= -135dBc/Hz
VCO flicker at 1 kHz = Fv3_dB+20log10(fvco)-30log10(fm)= -168 +198-90 = -60dBc/Hz
These four values help to visualize the main contributors to phase noise in the closed loop PLL. Each falls on a linear
line on the log-frequency phase noise plot shown in Figure 25.
-20
-40
-60
-80
-100
-120
-140
-160
-180
100
VCO at 1 kHz
PLL at 1 kHz
VCO at 1 MHz
1000
104
105
106
FREQUENCY OFFSET (Hz)
PLL Floor
107
108
Figure 25. Example of Figure of Merit models at 8 GHz
5 - 15
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