Z8523016VEG Datasheet, PDF (88/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
83
Table 44. Z80230 General Timing Characteristics (Continued)
10 MHz
16 MHz
No. Symbol
Parameter
Min. Max. Min. Max. Notes
Notes:
1. RxC is RTxC or TRxC, whichever is supplying the receive clock.
2. TxC is TRxC or RTxC, whichever is supplying the transmit clock.
3. Both RTxC and SYNC have 30 pf capacitors to ground connected to them.
4. Synchronization of RxC to PCLK is eliminated in divide by four operation.
5. Parameter applies only to FM encoding/decoding.
6. Parameter applies only for transmitter and receiver; DPLL and BRG timing requirements are identical to PCLK
requirements.
7. The maximum transmit or receive data rate is 1/4 PCLK.
8. Applies to the DPLL clock source only. Maximum data rate of 1/4 PCLK still applies. DPLL clock must have a
50% duty cycle.
9. Units in ns.
10. Units in TcPc.
Table 45 lists the Z80230 Read and Write AC characteristics.
Table 45. Z80230 AC Characteristics
10 MHz
No Symbol
Parameter
Min. Max.
1
TwAS
AS Low Width
30
2
TdDS (AS) DS Rise to AS Fall Delay
10
3
TsCS0 (AS) CS0 to AS Rise Setup Time
0
4
ThCS0 (AS) CS0 to AS Rise Hold Time
20
5
TsCS1 (DS) CS1 to DS Fall Setup Time
50
6
ThCS1 (DS) CS1 to DS Rise Hold Time
20
7
TsIA (AS) INTACK to AS Rise Setup Time 10
8
ThIA (AS) INTACK to AS Rise Hold Time 125
9
TsRWR
R/W (Read) to DS Fall Setup
50
(DS)
Time
10 ThRW (DS) R/W to DS Rise Hold Time
0
11 TsRWW
R/W (Write) to DS Fall Setup
0
(DS)
Time
12 TdAS (DS) AS Rise to DS Fall Delay
20
16 MHz
Min. Max
20
10
0
15
35
10
10
100
35
0
0
15
Notes
8
1, 8
1, 8
1, 8
1, 8
1, 8
8
8
8
8
8
8
PS005308-0609
Electrical Characteristics