Z8523016VEG Datasheet, PDF (106/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
101
Figure 35 displays the procedure for resetting highest IUS.
Ext/Status
Interrupt
DMA read
EOF
INT
Ext/Status IP
Reset Highest
IUS from
Ext/Status
Handler
RCA IP
Ext/Status IUS
Resetting highest IUS from lower priority interrupt clears the EOF (RCA) interrupt.
Figure 35. Resetting Highest IUS from Lower Priority
RTS Problem Description
The ESCC (Z80230/Z85230/L) contains a functional problem in Automatic RTS Deacti-
vation (see Figure 36 on page 102).
This mode is intended for SDLC applications where the RTS signal from the ESCC is used
to enable a line driver in multi-drop line communications.
Before the frame transmission, RTS is asserted by an Activate RTS command (ER5 bit1
equals 0).
After the last data bit of a frame is sent, a Transmit Underrun interrupt is requested. A
Deactivate RTS command is issued (WR5 bit 1 equals 1) to deactivate the RTS signal to
turn off the line driver after the multiple-frame packet is sent.
On the SCC, the processor must monitor the data line to ensure that the frame has been
sent before it issues the Deactivate RTS command.
On the ESCC, RTS can be programmed to deactivate automatically after the frame is sent.
If the following sequence is performed, additional monitoring is not required:
1. Enable Automatic RTS Deactivation (WR7’ bit 2 equals 1).
PS005308-0609
Z80230/Z85230/L Errata