XC3S200A-4VQG100C Datasheet, PDF (6/132 Pages) Xilinx, Inc – Architectural and Configuration Overview

Introduction and Ordering Information
Production Status
Table 3 indicates the production status of each Spartan-3A
FPGA by temperature range and speed grade. The table
also lists the earliest speed file version required for creating
a production configuration bitstream. Later versions are also
supported.
Table 3: Spartan-3A FPGA Production Status (Production Speed File)
Temperature Range
Commercial (C)
Speed Grade
Standard (–4)
High-Performance (–5)
XC3S50A
Production
(v1.35)
Production
(v1.35)
XC3S200A
Production
(v1.35)
Production
(v1.35)
XC3S400A
Production
(v1.36)
Production
(v1.36)
XC3S700A
Production
(v1.34)
Production
(v1.35)
XC3S1400A
Production
(v1.34)
Production
(v1.35)
Industrial
Standard (–4)
Production
(v1.35)
Production
(v1.35)
Production
(v1.36)
Production
(v1.34)
Production
(v1.34)
Package Marking
Figure 2 provides a top marking example for Spartan-3A
FPGAs in the quad-flat packages. Figure 3 shows the top
marking for Spartan-3A FPGAs in BGA packages. The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator.
The “5C” and “4I” Speed Grade/Temperature Range part
combinations may be dual marked as “5C/4I”. Devices with
a single mark are only guaranteed for the marked speed
grade and temperature range.
Device Type
Package
Speed Grade
Temperature Range
R
R
SPARTAN
XC3S50A^TM
TQ144 AGQ0625
D1234567A
4C
Mask Revision Code
Fabrication Code
Process Technology
Date Code
Lot Code
Pin P1
DS529-1_03_080406
Figure 2: Spartan-3A QFP Package Marking Example
BGA Ball A1
Device Type
Package
Speed Grade
R
SPARTAN ^R
XC3S50A^TM
FT256 AGQ0625
D1234567A
4C
Mask Revision Code
Fabrication Code
Process Code
Date Code
Lot Code
Temperature Range
DS529-1_02_021206
Figure 3: Spartan-3A BGA Package Marking Example
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DS529-1 (v2.0) August 19, 2010