DS695 Datasheet, PDF (22/27 Pages) Xilinx, Inc – XPS Thin Film Transistor

XPS Thin Film Transistor (TFT) Controller (v2.00a)
XPS TFT Register Read/Write through DCR slave interface
Figure 11 shows XPS TFT controller register access through DCR slave interface.
Figure Top x-ref 11
Cycles 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
DCR_Clk
DCR_Abus[0:9]
A0
A0
DCR_Sl_DBus[0:31]
D0
DCR_Read
DCR_Write
Sl_DCRAck
Sl_DCRDBus[0:31]
D0
DS695_10_020509
Figure 11: XPS TFT Register Read/Write Through DCR Slave Interface
XPS TFT Use Cases
The XPS TFT controller system can be build for different use cases based on the processor interface and
the core slave interface. Following are the uses cases for XPS TFT controller.
• Standard PowerPC® processor system with PLB slave interface (Figure 12)
• Standard PowerPC processor system with DCR slave interface (Figure 13)
• Microblaze™ processor system with DCR slave interface (Figure 14)
• PowerPC processor system with separate PLB bus for XPS TFT master and slave interface
(Figure 15).
Figure Top x-ref 12
DPLB0
PPC
IPLB0
PLBv46
PIM
MPMC
Memory
Master
Interface
XPS TFT
Controller
Slave
Interface
DS695_11_020509
Figure 12: XPS TFT PowerPC Processor System with PLB Slave Interface
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DS695 September 16, 2009
Product Specification