W83977ATF Datasheet, PDF (94/207 Pages) Winbond – WINBOND I/O

W83977ATF
PRELIMINARY
Bit 2:
Bit 1:
Bit 0:
INV_CRC - Inverting CRC
When set to 1, the CRC is inversely output in physical layer.
DIS_CRC - Disable CRC
When set to 1, the transmitter does not transmit CRC in physical layer.
Reserved, write 1.
4.8.2 Set6.Reg1 - MIR (1.152M/0.576M bps) Pulse Width
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
MIR_PW
-
-
-
M_PW4 M_PW3
Reset Value
0
0
0
0
1
This 5-bit register sets MIR output pulse width.
Bit 2
M_PW2
0
Bit 1
M_PW1
1
Bit 0
M_PW0
0
M_PW4~0
00000
00001
00010
...
k₁₀
...
11111
MIR Pulse Width (1.152M bps)
0 ns
20.83 ns
41.66 (==20.83*2) ns
...
20.83*k₁₀ ns
...
645 ns
MIR Output Width (0.576M bps)
0 ns
41.66 ns
83.32 (==41.66*2) ns
...
41.66*k₁₀ ns
...
1290 ns
4.8.3 Set6.Reg2 - SIR Pulse Width
Reg.
Bit 7
Bit 6
Bit 5
SIR_PW
-
-
-
Reset Value
0
0
0
Bit 4
S_PW4
0
Bit 3
S_PW3
0
Bit 2
S_PW2
0
Bit 1
S_PW1
0
Bit 0
S_PW0
0
This 5-bit register sets SIR output pulse width.
S_PW4~0
SIR Output Pulse Width
00000
3/16 bit time of IR
01101
1.6 us
Others
1.6 us
- 75 -
Publication Release Date:April 1998
Revision 0.52