W83977ATF Datasheet, PDF (155/207 Pages) Winbond – WINBOND I/O

W83977ATF
PRELIMINARY
Bit 4: MSRKEY. Select Mouse Left/Right Botton to wake-up system via PANSWOUT .
= 0 Select click on Mouse Left-button twice to wake the system up.
= 1 Select click on Mouse right-button twice to wake the system up.
Bit 3: CIRKEY. Select CIR wake-up system via PANSWOUT .
= 0 Disable CIR wake-up function.
= 1 Enable CIR wake-up function.
Bit 2: KB/MS Swap. Enable Keyboard/Mouse port-swap.
= 0 Keyboard/Mouse ports are not swapped.
= 1 Keyboard/Mouse ports are swapped.
Bit 1: MSXKEY. Enable any character received from Mouse to wake-up the system.
= 0 Just clicking Mouse left/right-button twice can wake the system up.
= 1 Any character received from Mouse can wake the system up (the setting of Bit 4 is
ignored).
Bit 0: KBXKEY. Enable any character received from Keyboard to wake-up the system.
= 0 Only predetermined specific key combination can wake up the system.
= 1 Any character received from Keyboard can wake up the system.
CRE1 (Default 0x00) Keyboard Wake-up Index Register
This register is used to indicate which Keyboard Wake-up Shift register or Predetermined key
Register is to be read/written via CRE2. The range of Keyboard wake-up index register is 0x00-0x19,
and the range of CIR wake-up index range register is 0x20-0x2F.
CRE2 Keyboard Wake-up Data Register
This register holds the value of wake-up key register indicated by CRE1. This register can be
read/write.
CRE3 (Read only) Keyboard/Mouse Wake-up Status Register
Bit 7-4: Reserved.
Bit 3: CIR_STS. The Panel switch event is caused by CIR wake-up event. This bit is cleared by
reading this register.
Bit 2: PANSW_STS. The Panel switch event is caused by PANSWIN . This bit is cleared by
reading this register.
Bit 1: Mouse_STS. The Panel switch event is caused by Mouse wake-up event. This bit is cleared
by reading this register.
Bit 2: Keyboard_STS. The Panel switch event is caused by Keyboard wake-up event. This bit is
cleared by reading this register.
CRE4 This Register is reserved for test.
CRE5 (Default 0x00)
Bit 7: Reserved.
Bit 6-0: Compared Code Length. When the compared codes are storage in the data register,
these data length should be written to this register.
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Publication Release Date:April 1998
Revision 0.52