W83977ATF Datasheet, PDF (71/207 Pages) Winbond – WINBOND I/O

W83977ATF
PRELIMINARY
Set
Sets Description
0 Legacy/Advanced IR Control and Status Registers.
1 Legacy Baud Rate Divisor Register.
2 Advanced IR Control and Status Registers.
3 Version ID and Mapped Control Registers.
4 Transmitter/Receiver/Timer Counter Registers and IR Control Registers.
5 Flow Control and IR Control and Frame Status FIFO Registers.
6 IR Physical Layer Control Registers
7 Remote Control and IR front-end Module Selection Registers.
4.2 Set0-Legacy/Advanced IR Control and Status Registers
Address Offset Register Name
Register Description
0
RBR/TBR Receiver/Transmitter Buffer Registers
1
ICR
Interrupt Control Register
2
ISR/UFR Interrupt Status or IR FIFO Control Register
3
UCR/SSR IR Control or Sets Select Register
4
HCR
Handshake Control Register
5
USR
IR Status Register
6
HSR
Handshake Status Register
7
UDR/ESCR User Defined Register
4.2.1 Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write)
Receiver Buffer Register is read only and Transmitter Buffer Register is write only. When operating
in the PIO mode, the port is used to Receive/Transmit 8-bit data.
When function as a legacy IR, this port only supports PIO mode. If set in the advanced IR mode and
configured as MIR/FIR/Remote IR, this port can support DMA transmission. Two DMA channels can
be used simultaneously, one for TX DMA and the other for RX DMA. Therefore, single DMA channel
is also supported when the bit of D_CHSW (DMA Channel Swap, in Set2.Reg2.Bit3) is set and the
TX/RX DMA channel is swapped. Note that two DMA channels can be defined in configure register
CR2A, which selects DMA channel or disables DMA channel. If only RX DMA channel is enabled
while TX DMA channel is disabled, then the single DMA channel will be selected.
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Publication Release Date:April 1998
Revision 0.52