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W83977ATF Datasheet, PDF (89/207 Pages) Winbond – WINBOND I/O
W83977ATF
PRELIMINARY
4.6.4 Set4.Reg4, 5 - Transmitter Frame Length (TFRLL/TFRLH)
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
TFRLL
Reset Value
TFRLH
Reset Value
bit 7
0
-
-
bit 6
0
-
-
bit 5
bit 4
bit3
0
0
0
-
bit 12 bit 11
-
0
0
Bit 2
bit 2
0
bit 10
0
Bit 1
bit 1
0
bit 9
0
Bit 0
bit 0
0
bit 8
0
These are combined to be a 13-bit register. Writing these registers programs the transmitter frame
length of a package. These registers are only valid when APM=1 (automatic package mode,
Set5.Reg4.bit5). When APM=1, the physical layer will split data stream to a programmed frame
length if the transmitted data is larger than the programmed frame length. When these registers are
read, they will return the number of bytes which is not transmitted from a frame length programmed.
4.6.5 Set4.Reg6, 7 - Receiver Frame Length (RFRLL/RFRLH)
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
RFRLL
Reset Value
bit 7
0
bit 6
0
bit 5
0
bit 4
0
bit 3
0
RFRLH
-
-
-
bit 12 bit 11
Reset Value
-
-
-
0
0
Bit 2
bit 2
0
bit 10
0
Bit 1
bit 1
0
bit 9
0
Bit 0
bit 0
0
bit 8
0
These are combined to be a 13-bit register and up counter. The length of receiver frame will be
limited to the programmed frame length. If the received frame length is larger than the programmed
receiver frame length, the bit of MX_LEX (Maximum Length Exceed) will be set to 1. Simultaneously,
the receiver will not receive any more data to RX FIFO until the next start flag of the next frame,
which is defined in the physical layer IrDA 1.1. Reading these registers returns the number of
received data bytes of a frame from the receiver.
4.7 Set 5 - Flow control and IR control and Frame Status FIFO registers
Address Offset Register Name
Register Description
0
FCBLL Flow Control Baud Rate Divisor Latch Register (Low Byte)
1
FCBHL Flow Control Baud Rate Divisor Latch Register (High Byte)
2
FC_MD Flow Control Mode Operation
3
SSR
Sets Select Register
4
IRCFG1 Infrared Configure Register
5
FS_FO Frame Status FIFO Register
6
RFRLFL Receiver Frame Length FIFO Low Byte
7
RFRLFH Receiver Frame Length FIFO High Byte
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Publication Release Date:April 1998
Revision 0.52