W83977ATF Datasheet, PDF (159/207 Pages) Winbond – WINBOND I/O

W83977ATF
PRELIMINARY
Bit 1: URAIRQSTS. UART A IRQ status.
Bit 0: URBIRQSTS. UART B IRQ status.
CRF4 (Default 0x00)
Reserved. Return zero when read.
CRF5 (Default 0x00)
Reserved. Return zero when read.
CRF6 (Default 0x00)
These bits enable the generation of an SMI interrupt due to any IRQ of the devices. These 4 bits
control the printer port, FDC, UART A, and UART B SMI logics respectively. The SMI logic output
for the IRQs is as follows:
SMI logic output = (URBIRQEN and URBIRQSTS) or (URAIRQEN and URAIRQSTS) or
(FDCIRQEN and FDCIRQSTS) or (PRTIRQEN and PRTIRQSTS) or
(KBCIRQEN and KBCIRQSTS) or (MOUIRQEN and MOUIRQSTS) or
(IRIRQEN and IRIRQSTS)
Bit 7: Reserved. Return zero when read.
Bit 6: IRIRQEN.
= 0 disable the generation of an SMI interrupt due to IR's IRQ.
= 1 enable the generation of an SMI interrupt due to IR's IRQ.
Bit 5: MOUIRQEN.
= 0 disable the generation of an SMI interrupt due to MOUSE's IRQ.
= 1 enable the generation of an SMI interrupt due to MOUSE's IRQ.
Bit 4: KBCIRQEN.
= 0 disable the generation of an SMI interrupt due to KBC's IRQ.
= 1 enable the generation of an SMI interrupt due to KBC's IRQ.
Bit 3: PRTIRQEN.
= 0 disable the generation of an SMI interrupt due to printer port's IRQ.
= 1 enable the generation of an SMI interrupt due to printer port's IRQ.
Bit 2: FDCIRQEN.
= 0 disable the generation of an SMI interrupt due to FDC's IRQ.
= 1 enable the generation of an SMI interrupt due to FDC's IRQ.
Bit 1: URAIRQEN.
= 0 disable the generation of an SMI interrupt due to UART A's IRQ.
= 1 enable the generation of an SMI interrupt due to UART A's IRQ.
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Publication Release Date:April 1998
Revision 0.52