W83977ATF Datasheet, PDF (170/207 Pages) Winbond – WINBOND I/O

W83977ATF
PRELIMINARY
9.1 SMI to SCI/SCI to SMI and Bus Master
The following figure illustrates the process of generating an interrupt from SMI to SCI or from SCI to
SMI .
from SMI to SCI
BIOS_RLS
GBL_EN
from SCI to SMI
GBL_RLS
BIOS_EN
Bus Master SCI
BM_CNTPL
BM_RLD
: Status bit
: Enable bit
clear
set
clear
set
clear
set
GBL_STS
To SCI Logic
BIOS_STS
To SMI Logic
BM_STS
To SCI Logic
For the BIOS software to raise an event to the ACPI software, BIOS_RLS, GBL_EN, and GBL_STS
bits are involved. GBL_EN is the enable bit and the GBL_STS is the status bit. Both are controlled
by the ACPI software. If BIOS_RLS is set by the BIOS software and GBL_EN is set by the ACPI
software, an SCI interrupt is raised. Writing a 1 to BIOS_RLS sets it to logic 1 and also sets
GBL_STS to logic 1. Writing a 0 to BIOS_RLS has no effect. Writing a 1 to GBL_STS clears it to
logic 0 and also clears BIOS_RLS to logic 0. Writing a 0 to GBL_STS has no effect.
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Publication Release Date:April 1998
Revision 0.53