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W25N01GVZEIT-TR Datasheet, PDF (7/68 Pages) Winbond – 3V 1G-BIT SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ | |||
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W25N01GVxxIG/IT
1. GENERAL DESCRIPTIONS
The W25N01GV (1G-bit) Serial SLC NAND Flash Memory provides a storage solution for systems with
limited space, pins and power. The W25N SpiFlash family incorporates the popular SPI interface and the
traditional large NAND non-volatile memory space. They are ideal for code shadowing to RAM, executing
code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single
2.7V to 3.6V power supply with current consumption as low as 25mA active and 10µA for standby. All W25N
SpiFlash family devices are offered in space-saving packages which were impossible to use in the past for
the typical NAND flash memory.
The W25N01GV 1G-bit memory array is organized into 65,536 programmable pages of 2,048-bytes each.
The entire page can be programmed at one time using the data from the 2,048-Byte internal buffer. Pages
can be erased in groups of 64 (128KB block erase). The W25N01GV has 1,024 erasable blocks.
The W25N01GV supports the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI: Serial Clock,
Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to
104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz
(104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions.
The W25N01GV provides a new Continuous Read Mode that allows for efficient access to the entire
memory array with a single Read command. This feature is ideal for code shadowing applications.
A Hold pin, Write Protect pin and programmable write protection, provide further control flexibility.
Additionally, the device supports JEDEC standard manufacturer and device ID, one 2,048-Byte Unique ID
page, one 2,048-Byte parameter page and ten 2,048-Byte OTP pages. To provide better NAND flash
memory manageability, user configurable internal ECC, bad block management are also available in
W25N01GV.
2. FEATURES
⢠New W25N Family of SpiFlash Memories
â W25N01GV: 1G-bit / 128M-byte
â Standard SPI: CLK, /CS, DI, DO, /WP,
/Hold
â Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
â Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
â Compatible SPI serial flash commands
⢠Highest Performance Serial NAND Flash
â 104MHz Standard/Dual/Quad SPI clocks
â 208/416MHz equivalent Dual/Quad SPI
â 50MB/S continuous data transfer rate
â Fast Program/Erase performance
â More than 100,000 erase/program cycles
â More than 10-year data retention
⢠Efficient âContinuous Read Modeâ(1)
â Alternative method to the Buffer Read
Mode
â No need to issue âPage Data Readâ
between Read commands
â Allows direct read access to the entire
array
⢠Low Power, Wide Temperature Range
â Single 2.7 to 3.6V supply
â 25mA active, 10µA standby current
â -40°C to +85°C operating range
⢠Flexible Architecture with 128KB blocks
â Uniform 128K-Byte Block Erase
â Flexible page data load methods
⢠Advanced Features
â On chip 1-Bit ECC for memory array
â ECC status bits indicate ECC results
â bad block management and LUT(2) access
â Software and Hardware Write-Protect
â Power Supply Lock-Down and OTP protection
â 2KB Unique ID and 2KB parameter pages
â Ten 2KB OTP pages(3)
⢠Space Efficient Packaging
â 8-pad WSON 8x6-mm
â 16-pin SOIC 300-mil
â 24-ball TFBGA 8x6-mm
â Contact Winbond for other package options
Notes:
1. Only the Read command structures are different between
the âContinuous Read Mode (BUF=0)â and the âBuffer
Read Mode (BUF=1)â, all other commands are identical.
W25N01GVxxIG: Default BUF=1 after power up
W25N01GVxxIT: Default BUF=0 after power up
2. LUT stands for Look-Up Table.
3. OTP pages can only be programmed.
Publication Release Date: March 21, 2016
-6-
Revision G
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