W25N01GVZEIT-TR Datasheet, PDF (27/68 Pages) Winbond – 3V 1G-BIT SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ

W25N01GVxxIG/IT
8.2 Instruction Descriptions
8.2.1 Device Reset (FFh)
Because of the small package and the limitation on the number of pins, the W25N01GV provide a software
Reset instruction instead of a dedicated RESET pin. Once the Reset instruction is accepted, any on-going
internal operations will be terminated and the device will return to its default power-on state and lose all the
current volatile settings, such as Volatile Status Register bits. Once the Reset command is accepted by the
device, the device will take approximately tRST to reset, depending on the current operation the device is
performing, tRST can be 5us~500us. During this period, no command will be accepted.
Data corruption may happen if there is an on-going internal Erase or Program operation when Reset
command sequence is accepted by the device. It is recommended to check the BUSY bit in Status Register
before issuing the Reset command.
/CS
CLK
Mode 3
Mode 0
DI
(IO₀)
DO
(IO₁)
01234567
Mode 3
Mode 0
Instruction (FFh)
High Impedance
Figure 5. Device Reset Instruction
Default values of the Status Registers after power up and Device Reset
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Publication Release Date: March 21, 2016
Revision G