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W25N01GVZEIT-TR Datasheet, PDF (5/68 Pages) Winbond – 3V 1G-BIT SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ
W25N01GVxxIG/IT
Table of Figures
Figure 1a. W25N01GV Pad Assignments, 8-pad WSON 8x6-mm (Package Code ZE) .............................. 7
Figure 1b. W25N01GV Pin Assignments, 16-pin SOIC 300-mil (Package Code SF) .................................. 8
Figure 1c. W25N01GV Ball Assignments, 24-ball TFBGA 8x6-mm (Package Code TB & TC) ................... 9
Figure 2. W25N01GV Flash Memory Architecture and Addressing ........................................................... 11
Figure 3. W25N01GV Flash Memory Operation Diagram .......................................................................... 12
Figure 4a. Protection Register / Status Register-1 (Address Axh) ............................................................. 15
Figure 4b. Configuration Register / Status Register-2 (Address Bxh) ........................................................ 17
Figure 4c. Status Register-3 (Address Cxh) ............................................................................................... 19
Figure 5. Device Reset Instruction .............................................................................................................. 26
Figure 6. Read JEDEC ID Instruction ......................................................................................................... 27
Figure 7. Read Status Register Instruction ................................................................................................. 28
Figure 8. Write Status Register-1/2/3 Instruction ........................................................................................ 29
Figure 9. Write Enable Instruction............................................................................................................... 30
Figure 10. Write Disable Instruction ............................................................................................................ 30
Figure 11. Bad Block Management Instruction ........................................................................................... 31
Figure 12. Read BBM Look Up Table Instruction ....................................................................................... 32
Figure 13. Last ECC Failure Page Address Instruction .............................................................................. 33
Figure 14. 128KB Block Erase Instruction .................................................................................................. 34
Figure 15. Load / Random Load Program Data Instruction ........................................................................ 35
Figure 16. Quad Load / Quad Random Load Program Data Instruction .................................................... 36
Figure 17. Program Execute Instruction ..................................................................................................... 37
Figure 18. Page Data Read Instruction....................................................................................................... 38
Figure 19a. Read Data Instruction (Buffer Read Mode, BUF=1) ................................................................ 39
Figure 19b. Read Data Instruction (Continuous Read Mode, BUF=0) ....................................................... 39
Figure 20a. Fast Read Instruction (Buffer Read Mode, BUF=1) ................................................................ 40
Figure 20b. Fast Read Instruction (Continuous Read Mode, BUF=0) ........................................................ 40
Figure 21a. Fast Read with 4-Byte Address Instruction (Buffer Read Mode, BUF=1) ............................... 41
Figure 21b. Fast Read with 4-Byte Address Instruction (Continuous Read Mode, BUF=0)....................... 41
Figure 22a. Fast Read Dual Output Instruction (Buffer Read Mode, BUF=1) ............................................ 42
Figure 22b. Fast Read Dual Output Instruction (Continuous Read Mode, BUF=0) ................................... 42
Figure 23a. Fast Read Dual Output with 4-Byte Address Instruction (Buffer Read Mode, BUF=1) ........... 43
Figure 23b. Fast Read Dual Output with 4-Byte Address Instruction (Continuous Read Mode, BUF=0) .. 43
Figure 24a. Fast Read Quad Output Instruction (Buffer Read Mode, BUF=1)........................................... 44
Figure 24b. Fast Read Quad Output Instruction (Continuous Read Mode, BUF=0) .................................. 44
Figure 25a. Fast Read Quad Output with 4-Byte Address Instruction (Buffer Read Mode, BUF=1) ......... 45
Figure 25b. Fast Read Quad Output with 4-Byte Address Instruction (Continuous Read Mode, BUF=0). 45
Figure 26a. Fast Read Dual I/O Instruction (Buffer Read Mode, BUF=1) .................................................. 46
Figure 26b. Fast Read Dual I/O Instruction (Continuous Read Mode, BUF=0).......................................... 46
Figure 27a. Fast Read Dual I/O with 4-Byte Address Instruction (Buffer Read Mode, BUF=1) ................. 47
Figure 27b. Fast Read Dual I/O with 4-Byte Address Instruction (Continuous Read Mode, BUF=0) ........ 47
Figure 28a. Fast Read Quad I/O Instruction (Buffer Read Mode, BUF=1)................................................. 48
Figure 28b. Fast Read Quad I/O Instruction (Continuous Read Mode, BUF=0) ........................................ 49
Publication Release Date: March 21, 2016
-4-
Revision G