W25N01GVZEIT-TR Datasheet, PDF (39/68 Pages) Winbond – 3V 1G-BIT SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ

W25N01GVxxIG/IT
8.2.14 Page Data Read (13h)
The Page Data Read instruction will transfer the data of the specified memory page into the 2,112-Byte
Data Buffer. The instruction is initiated by driving the /CS pin low then shifting the instruction code “13h”
followed by 8-bit dummy clocks and the 16-bit Page Address into the DI pin as shown in Figure 18.
After /CS is driven high to complete the instruction cycle, the self-timed Read Page Data instruction will
commence for a time duration of tRD (See AC Characteristics). While the Read Page Data cycle is in
progress, the Read Status Register instruction may still be used for checking the status of the BUSY bit.
The BUSY bit is a 1 during the Read Page Data cycle and becomes a 0 when the cycle is finished and the
device is ready to accept other instructions again.
After the 2,112 bytes of page data are loaded into the Data Buffer, several Read instructions can be issued
to access the Data Buffer and read out the data. Depending on the BUF bit setting in the Status Register,
either “Buffer Read Mode” or “Continuous Read Mode” may be used to accomplish the read operations.
Figure 18. Page Data Read Instruction
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Publication Release Date: March 21, 2016
Revision G