W25N01GVZEIT-TR Datasheet, PDF (53/68 Pages) Winbond – 3V 1G-BIT SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ

W25N01GVxxIG/IT
8.2.26 Accessing Unique ID / Parameter / OTP Pages (OTP-E=1)
In addition to the main memory array, the W25N01GV is also equipped with one Unique ID Page, one
Parameter Page, and ten OTP Pages.
Page Address
00h
01h
02h
…
0Bh
Page Name
Unique ID Page
Parameter Page
OTP Page [0]
OTP Pages [1:8]
OTP Page [9]
Descriptions
Factory programmed, Read Only
Factory programmed, Read Only
Program Only, OTP lockable
Program Only, OTP lockable
Program Only, OTP lockable
Data Length
32-Byte x 16
256-Byte x 3
2,112-Byte
2,112-Byte
2,112-Byte
To access these additional data pages, the OTP-E bit in Status Register-2 must be set to “1” first. Then,
Read operations can be performed on Unique ID and Parameter Pages, Read and Program operations can
be performed on the OTP pages if it’s not already locked. To return to the main memory array operation,
OTP-E bit needs to be to set to 0.
Read Operations
A “Page Data Read” command must be issued followed by a specific page address shown in the table
above to load the page data into the main Data Buffer. After the device finishes the data loading (BUSY=0),
all Read commands may be used to read the Data Buffer starting from any specified Column Address.
Please note all Read commands must now follow the “Buffer Read Mode” command structure (CA[15:0],
number of dummy clocks) regardless the previous BUF bit setting. ECC can also be enabled for the OTP
page read operations to ensure the data integrity.
Program and OTP Lock Operations
OTP pages provide the additional space (2K-Byte x 10) to store important data or security information that
can be locked to prevent further modification in the field. These OTP pages are in an erased state set in
the factory, and can only be programmed (change data from “1” to “0”) until being locked by OTP-L bit in
the Configuration/Status Register-2. OTP-E must be first set to “1” to enable the access to these OTP
pages, then the program data must be loaded into the main Data Buffer using any “Program Data Load”
commands. The “Program Execute” command followed by a specific OTP Page Address is used to initiate
the data transfer from the Data Buffer to the OTP page. When ECC is enabled, ECC calculation will be
performed during “Program Execute”, and the ECC information will be stored into the 64-Byte spare area.
Once the OTP pages are correctly programmed, OTP-L bit can be used to permanently lock these pages
so that no further modification is possible. While still in the “OTP Access Mode” (OTP-E=1), user needs to
set OTP-L bit in the Configuration/Status Register-2 to “1”, and issue a “Program Execute” command
without any Page Address. After the device finishes the OTP lock setting (BUSY=0), the user can set OTP-
E to “0” to return to the main memory array operation.
SR1-L OTP Lock Operation
The Protection/Status Register-1 contains protection bits that can be set to protect either a portion or the
entire memory array from being Programmed/Erased or set the device to either Software Write Protection
(WP-E=0) or Hardware Write Protection (WP-E=1). Once the BP[3:0], TB, WP-E bits are set correctly,
SRP1 and SRP0 should also be set to “1”s as well to allow SR1-L bit being set to “1” to permanently lock
the protection settings in the Status Register-1 (SR1). Similar to the OTP-L setting procedure above, in
order to set SR1-L lock bit, the device must enter the “OTP Access Mode” (OTP-E=1) first, and SR1-L bit
should be set to “1” prior to the “Program Execute” command without any Page Address. Once SR1-L is
set to “1” (BUSY=0), the user can set OTP-E to “0” to return to the main memory array operation.
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Publication Release Date: March 21, 2016
Revision G