W968D6DA Datasheet, PDF (62/75 Pages) Winbond – Low-power features

W968D6DA
10.2.21 Burst WRITE Row Boundary Crossing
CLK
VIH
VIL
tCLK
A[max:0 _VIH
] VIL
ADV#
VIH
VIL
256Mb Async./Page,Syn./Burst CellularRAM
LB#/UB# ^VIH
VIL
WE#
VIH
VIL
OE#
VIH
VIL
CE#
VIH
VIL
WAIT
VOH
VOL
DQ[15:0]
VIH
VIL
tKHTL
tSP tHD
Valid input
Note 2
Valid input Valid input
Valid input Valid input
End of row
Don‟t
Care
Notes : 1. Non-default BCR settings for burst WRITE at end of row : fixed or variable latency, WAIT active LOW, WAIT asserted
during delay (shown as solid line).
2. WAIT will be asserted for LC cycles for variable latency, or LC cycles for fixed latency.
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Publication Release Date : June 27, 2013
Revision : A01-003