W968D6DA Datasheet, PDF (35/75 Pages) Winbond – Low-power features

W968D6DA
256Mb Async./Page,Syn./Burst CellularRAM
8.4.4 Refresh Configuration Register
The refresh configuration register (RCR) defines how the CellularRAM device performs its transparent self refresh.
Altering the refresh parameters can dramatically reduce current consumption during standby mode. Page mode
control is also embedded into the RCR.
The RCR is accessed with CRE HIGH and A[19:18] = 00b; or through the register access software sequence with
DQ = 0000h on the third cycle.
8.4.4.1 Refresh Configuration Register Mapping
A[max:20] A[19:18] A[17:8]
A7 A6 A5
A4
A3
A2
A1
A0 Address Bus
Max-20 19-18 17-8
7
65
4
3
2
1
0
Reserved
Register
Select
Reserved
Page
Reserved DPD
Reserved
PAR
All must be set to “0” All must be set to “0”
Setting is ignored
(Default 00b)
Must be set to “0”
RCR [19] RCR [18] Register Select
0
0
Selsect RCR
1
0
Selsect BCR
0
1
Selsect DIDR
RCR [7] Page Mode Enable / Disable
0 Page Mode Disabled ( default )
1
Page Mode Enable
RCR [4] Deep Power - Down
0
DPD Enable
1 DPD Disable (default)
RCR [2] RCR [1] RCR [0]
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Refersh Coverage
Full array (default)
Bottom 1/2 array
Bottom 1/4 array
Bottom 1/8 array
None of array
Top 1/2 array
Top 1/4 array
Top 1/8 array
8.4.4.2 Partial Array Refresh (RCR[2:0] Default = Full Array Refresh
The PAR bits restrict refresh operation to a portion of the total memory array. This feature allows the device to
reduce standby current by refreshing only that part of the memory array required by the host system. The refresh
options are full array, one-half array, one-quarter array, one-eighth array, or none of the array. The mapping of these
partitions can start at either the beginning or the end of the address map.
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Publication Release Date : June 27, 2013
Revision : A01-003