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DS90UB925Q-Q1 Datasheet, PDF (6/51 Pages) Texas Instruments – 5 to 85 MHz 24-Bit Color FPD-Link III Serializer With Bidirectional Control Channel
DS90UB925Q-Q1
SNLS407D – APRIL 2012 – REVISED OCTOBER 2014
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Pin Functions (continued)
PIN NAME
PIN #
POWER AND GROUND (1)
VDD33
VDDIO
GND
22
30
DAP
REGULATOR CAPACITOR
CAPHS12,
CAPP12
17, 14
CAPL12
7
OTHERS
NC
RES[1:0]
16
18, 15
I/O, TYPE
DESCRIPTION
Power
Power
Ground
Power to on-chip regulator 3.0 V - 3.6 V. Requires 4.7 uF to GND
LVCMOS I/O Power 1.8 V ±5% OR 3.0 V - 3.6 V. Requires 4.7 uF to GND
DAP is the large metal contact at the bottom side, located at the center of the WQFN
package. Connect to the ground plane (GND) with at least 9 vias.
CAP
CAP
Decoupling capacitor connection for on-chip regulator. Requires a 4.7uF to GND at each
CAP pin.
Decoupling capacitor connection for on-chip regulator. Requires two 4.7uF to GND at this
CAP pin.
NC
GND
Do not connect.
Reserved. Tie to Ground.
(1) The VDD (VDD33 and VDDIO) supply ramp should be faster than 1.5 ms with a monotonic rise.
6
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