DS90UB925Q-Q1 Datasheet, PDF (14/51 Pages) Texas Instruments – 5 to 85 MHz 24-Bit Color FPD-Link III Serializer With Bidirectional Control Channel

DS90UB925Q-Q1
SNLS407D – APRIL 2012 – REVISED OCTOBER 2014
6.9 Typical Charateristics
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78 MHz TX
Pixel Clock
Input
(2 V/DIV)
78 MHz RX
Pixel Clock
Output
(2 V/DIV)
Time (1.25 ns/DIV)
Note: On the rising edge of each clock period, the CML driver outputs
a low Stop bit, high Start bit, and 33 DC-scrambled data bits.
Figure 9. Serializer CML Driver Output with 78 MHz TX Pixel
Clock
Time (10 ns/DIV)
Figure 10. Comparison of Deserializer LVCMOS RX PCLK
Output Locked to a 78 MHz TX PCLK
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