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DS90UB925Q-Q1 Datasheet, PDF (30/51 Pages) Texas Instruments – 5 to 85 MHz 24-Bit Color FPD-Link III Serializer With Bidirectional Control Channel
DS90UB925Q-Q1
SNLS407D – APRIL 2012 – REVISED OCTOBER 2014
www.ti.com
Register Maps (continued)
ADD
(dec)
6
7
8
10
11
12
ADD
(hex)
0x06
0x07
0x08
0x0A
0x0B
0x0C
Table 6. Serial Control Bus Registers (continued)
REGISTER
NAME
DES ID
Slave ID
Slave Alias
CRC Errors
General Status
BIT(S)
7:1
0
7:1
0
7:1
0
7:0
7:0
7:4
3
2
1
0
REGIST
ER
TYPE
RW
RW
RW
RW
R
R
R
R
R
R
DEFAULT
(hex)
FUNCTION
DESCRIPTION
0x00
0x00
0x00
0x00
0x00
0x00
DES Device 7-bit Deserializer Device ID
ID
Configures the I2C Slave ID of the remote Deserializer.
A value of 0 in this field disables I2C access to the
remote Deserializer. This field is automatically
configured by the Bidirectional Control Channel once
RX Lock has been detected. Software may overwrite
this value, but should also assert the FREEZE DEVICE
ID bit to prevent overwriting by the Bidirectional Control
Channel.
Device ID
Frozen
Freeze Deserializer Device ID
Prevents autoloading of the Deserializer Device ID by
the Bidirectional Control Channel. The ID will be frozen
at the value written.
Slave
Device ID
7-bit Remote Slave Device ID
Configures the physical I2C address of the remote I2C
Slave device attached to the remote Deserializer. If an
I2C transaction is addressed to the Slave Device Alias
ID, the transaction will be remapped to this address
before passing the transaction across the Bidirectional
Control Channel to the Deserializer
Reserved
Slave
Device
Alias ID
7-bit Remote Slave Device Alias ID
Assigns an Alias ID to an I2C Slave device attached to
the remote Deserializer. The transaction will be
remapped to the address specified in the Slave ID
register. A value of 0 in this field disables access to the
remote I2C Slave.
Reserved
CRC Error Number of back channel CRC errors – 8 least
LSB
significant bits
CRC Error Number of back channel CRC errors – 8 most
MSB
significant bits
Reserved
BIST CRC
Error
Back channel CRC error during BIST communication
with Deserializer.
The bit is cleared upon loss of link, restart of BIST, or
assertion of CRC ERROR RESET in register 0x04.
PCLK
Detect
PCLK Status
1: Valid PCLK detected
0: Valid PCLK not detected
DES Error
Back channel CRC error during communication with
Deserializer.
The bit is cleared upon loss of link or assertion of CRC
ERROR RESET in register 0x04.
LINK Detect LINK Status
1: Cable link detected
0: Cable link not detected (Fault Condition)
30
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