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DS90UB925Q-Q1 Datasheet, PDF (10/51 Pages) Texas Instruments – 5 to 85 MHz 24-Bit Color FPD-Link III Serializer With Bidirectional Control Channel
DS90UB925Q-Q1
SNLS407D – APRIL 2012 – REVISED OCTOBER 2014
www.ti.com
6.6 AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.(1) (2) (3)
PARAMETER
TEST CONDITIONS
PIN/FREQ.
MIN
GPIO BIT RATE
Forward Channel Bit Rate
BR
Back Channel Bit Rate
See (4) (5)
f = 5 – 85
MHz
GPIO[3:0]
RECOMMENDED TIMING FOR PCLK
tTCP
tCIH
tCIL
tCLKT
tIJIT
PCLK Period
PCLK Input High Time
PCLK Input Low Time
PCLK Input Transition Time,
See Figure 3 (4) (5)
PCLK Input Jitter Tolerance,
Bit Error Rate ≤10–10
See (4) (5)
PCLK
f / 40 < Jitter Freq < f / 20(4) (6)
(7)
f = 5 MHz
f = 85 MHz
f=5–
78MHz
11.76
0.4*T
0.4*T
4.0
0.5
0.4
TYP
0.25* f
75
T
0.5*T
0.5*T
0.6
MAX UNIT
Mbps
kbps
200 ns
0.6*T ns
0.6*T ns
ns
ns
UI
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Typical values represent most likely parametric norms at VDD = 3.3 V, TA = +25 °C, and at the Recommended Operating Conditions at
the time of product characterization and are not ensured.
(3) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD and ΔVOD, which are differential voltages.
(4) Specification is ensured by characterization and is not tested in production.
(5) Specification is ensured by design and is not tested in production.
(6) Jitter Frequency is specified in conjunction with DS90UB926 PLL bandwidth.
(7) UI – Unit Interval is equivalent to one serialized data bit width 1UI = 1 / (35*PCLK). The UI scales with PCLK frequency.
10
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