TI380PCI Datasheet, PDF (4/36 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCI
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS
SPWS020 – AUGUST 1995
PIN
NAME
NO.
4
16
24
28
31
40
52
GND
54
64
67
76
88
100
112
124
136
DB9 / UTP
89
ICT
110
ROMA07
101
ROMA06
102
ROMA05
103
ROMA04
104
ROMA03
105
ROMA02
107
ROMA01
108
ROMA00
109
ROMCS
90
10
22
34
37
46
50
58
VDD
70
79
82
94
106
118
130
142
† _{I = in, O = out}
Pin Functions
I/O†
DESCRIPTION
I
Ground. These pins must be attached to the common system ground plane.
Connector. The value on DB9 / UTP indicates the type of connector in use. Upon reset, DB9 / UTP’s value
O ^{is 0.}
1 = D-Shell (AUI or DB9)
0 = UTP / 10BaseT
ICT supports in-circuit tests. ICT should be pulled high for normal operation of the TI380PCI.
I
When pulled along with RST to a steady low state, all bi-directional signals in the TI380PCI are configured
as inputs, and all output pins of the TI380PCI are in 3-state mode.
ROM address. ROMA07 – ROMA00 form the least significant eight bits of the address for the RPL ROM.
The most significant bits (MSBs) of the ROM address are multiplexed onto the SADHx lines.
When RST is driven high, the value on ROMA07 – ROMA00 is latched into the board configuration register
I/O
in the TI380PCI configuration space. The value on ROMA07 – ROMA00 can be provided by pullup and
pulldown resistors that do not affect operation after reset. This feature allows designers to support jumpers
or board stuffing options that can be sensed by software that reads the board configuration register. If
pullup and pulldown registers are not used, the contents of the board configuration register are undefined
after reset.
O
ROMCS enables the outputs of the ROM when the ROM has been accessed. ROMCS enable allows the
data lines from the ROM to be driven.
I
5 - V supply. These pins must be attached to the common system power supply plane.
4
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