TI380PCI Datasheet, PDF (34/36 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCI
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS
SPWS020 – AUGUST 1995
AC characteristics
PARAMETER
ALT
MIN MAX UNIT
tCH1CH2 Rise time, clock
tR
1
µs
tCL1CL2 Fall time, clock
tF
300
ns
tDH1DH2 Rise time, input
tR
1
µs
tDL1DL1 Fall time, input
tF
300
ns
tCHDX
Setup time, clock high to input transition (see Note 11)
tSU:STA 4.7
µs
tCHCL
Pulse duration, clock high
t-HIGH
4
µs
tDLCL
Input low to clock low (START)
tHD:STA 4
µs
tCLDX
Clock low to input transition
tHD:DAT 0
µs
tCLCH
Pulse duration, clock low
tLOW
4.7
µs
tDXCX
Input transition to clock transition
tSU:DAT 250
ns
tCHDH
Clock high to input high (STOP)
tSU:STO 4.7
µs
tDHDL
Input high to input low (bus free)
tBUF
4.7
µs
tCLQV
Clock low to output valid
tAA
0.3 3.5
µs
tCLQX
Clock high to output transition
tDH
300
ns
fC
Clock frequency
fSCL
100 KHz
tLPF
Input low pass first order filter time constant (SCL and SDA inputs)
TI
100
ns
tW
Write time (see Note 12)
tWR
10
ms
NOTES: 11. For a reSTART condition, or following a write cycle
12. In the multibyte write mode only, if accessed bytes are on two consecutive rows (upper 5 MSB must not change), the maximum
programming time is doubled to 20 ms.
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