TI380PCI Datasheet, PDF (15/36 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCI
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS
serial EEPROM interface (EIF) (continued)
SPWS020 – AUGUST 1995
Input MSB to LSB >> LS
on each clock
XOR
MS CRC MSB to LSB >> LS
CRC SEED = 10101010
It is assumed that data in the serial EEPROM is shifted LSB to MSB, consistent with other serial communication
streams.
This is the routine that calculates the Serial EEPROM CRC over the first eight bytes of the EEPROM. The return
value is written to the ninth byte of the EEPROM. The “MSB” argument passed is a copy of the bytes read from
the EEPROM and stored in an array. Note that the BIA has its own checksum, which is not verified by the
TI380PCI.
unsigned short xor-crc (unsigned short *msb, int bytes)
{
BYTE crc=0xaa; // seed
int i;
for (i=0; i<bytes; i++)
crc^=msb[i];
return (crc);
}
The BIA downloaded from the EEPROM ultimately appears in the adapter RAM at chapter 0, address 0. The
high or odd byte of each 16-bit word contains two hex digits of the 12-digit BIA, the most significant digit first.
The last two high bytes of the first eight 16-bit words contain the 16-bit checksum of the BIA. The checksum
is performed as shown below.
example:
Here is an adapter RAM memory dump for a card with BIA = 0001fafe1093.
Address
Data
000000
: 0000 0100 fa00 fe00 1000 9300 0b00 9200
Address
Data
Checksum
01
00
03
01
05
fa
07
fe
09
10
0b
93
0c
0b
0d
92
0001
fafe
+ 1093
_____
(1) 0b92
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