TI380PCI Datasheet, PDF (30/36 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCI
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS
SPWS020 – AUGUST 1995
PARAMETER MEASUREMENT INFORMATION
Outputs are driven to a minimum high-logic level of 2.4 volts and to a maximum low-logic level of 0.6 volts. These
levels are compatible with TTL devices.
Output transition times are specified as follows: For a high-to-low transition on either an input or output signal,
the level at which the signal is said to be no longer high is 2 volts, and the level at which the signal is said to
be low is 0.8 volts. For a low-to-high transition, the level at which the signal is said to be no longer low is 0.8 volts,
and the level at which the signal is said to be high is 2 volts, as shown below.
The rise and fall times are not specified but are assumed to be those of standard TTL devices, which are typically
1.5 ns.
2 V (High)
0.8 V (Low)
test measurement
The test load circuit shown in Figure 13 represents the programmable load of the tester pin electronics used
to verify timing parameters of TI380PCI output signals.
TESTER PIN
ELECTRONICS
VLOAD
IOL
OUTPUT
UNDER
TEST
CT
IOH
Where:
I_OL = 2.0 mA DC level verification (all outputs)
I_OH = 400 µA (all outputs)
V_LOAD = 1.5 V typical DC level verification
0.7 V typical timing verification
C_T = 65 pF typical load circuit capacitance and includes probe and jig capacitance.
Figure 13. Test Load Circuit
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