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CDCE62002 Datasheet, PDF (8/49 Pages) Texas Instruments – Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
CDCE62002
SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage range VCC(2)
Input voltage range, VI (3)
Output voltage range, VO (3)
Input Current (VI < 0, VI > VCC)
Output current for LVPECL/LVCMOS Outputs (0 < VO < VCC)
Maximum junction temperature, TJ
Storage temperature range, Tstg
VALUE / UNIT
–0.5 V to 4.6 V
–0.5 V to VCC + 0.5 V
–0.5 V to VCC + 0.5 V
±20 mA
±50 mA
125°C
–65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All supply voltages have to be supplied simultaneously.
(3) The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
THERMAL CHARACTERISTICS
Package Thermal Resistance for QFN (RGZ) Package
Airflow (lfm)
0
200
400
JEDEC Compliant Board (3X3 VIAs on PAD)
JEDEC Compliant Board (3X3 VIAs on PAD)
JEDEC Compliant Board (3X3 VIAs on PAD)
θJP (°C/W)
1.13
1.13
1.13
θJA (°C/W)
35
28.3
27.2
PACKAGE
The CDCE62002 is packaged in a 32-Pin Lead Free “Green” Plastic Quad Flatpack Package with enhanced
bottom thermal pad for heat dissipation. The Texas Instruments Package Designator is; RHB (S-PQFP-N32).
Please refer to the Mechanical Data appendix at the end of this document for more information.
ELECTRICAL CHARACTERISTICS
recommended operating conditions for the CDCE62002 Device for under the specified Industrial temperature range of –40°C
to 85°C
PARAMETER
TEST CONDITIONS
POWER SUPPLY
Supply voltage, VCC_OUT, VCC_PLLDIV, VCC_PLLD, VCC_IN, and VCC_AUX
Analog Supply Voltage, VCC_PLLA, & VCC_VCO
PLVPECL
PLVDS
PLVCMOS
REF at 30.72MHz
Outputs are LVPECL
REF at 30.72MHz
Outputs are LVDS
REF at 30.72MHz
Outputs are LVCMOS
Output 1 = 491.52 MHz
Output 2 = 245.76 MHz
In case of LVCMOS Outputs (1) =
245.76MHz
POFF
REF at 30.72MHz
PPD
DIFFERENTIAL INPUT MODE (REF_IN)
Dividers and Outputs are disabled
Device is Powered Down
Input amplitude, VINPP (VIN+ – VIN–)
Common-mode input voltage, VIC
IIH
Differential input current High (No internal Termination)
VI = VCC,
VCC = 3.6 V
IIL
Differential input current Low (No internal Termination)
VI = 0 V,
VCC = 3.6 V
Input Capacitance on REF_IN
LVCMOS INPUT MODE (AUX_IN)
VIL
Low-level input voltage LVCMOS
MIN
TYP (1)
MAX UNIT
3
3.3
3
3.3
850
750
800
450
40
3.6
V
3.6
V
mW
mW
mW
mW
mW
0.1
1.3
V
1.0
VCC–03
V
20
µA
–20
µA
3
pF
0
0.3 VCC
V
(1) All typical values are at VCC = 3.3 V, temperature = 25°C.
8
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