CDCE62002 Datasheet, PDF (39/49 Pages) Texas Instruments – Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62002
www.ti.com.............................................................................................................................................................. SCAS882A – JUNE 2009 – REVISED JULY 2009
APPLICATION INFORMATION AND GENERAL USAGE HINTS
Clock Generator
The CDCE62002 can generate 1 to 4 low noise clocks from a single crystal or crystal oscillator as follows:
XTAL /
AUX _IN
Smart
MUX
Feedback
Divider
Input
Divider
PFD /
CP
Prescaler
Output
Divider 0
Output
Divider 1
U0P
U0N
U1P
U1N
Figure 32. CDCE62002 as a Clock Generator
External Feedback Option
The CDCE62002 has a limited optional external feedback path that give access to the PFD inside the device.
This option enables customers to implement complex or custom PLL designed to control the VCO inside the
CDCE62002. In addition, the External feedback allows the device to operate in a deterministic delay mode where
the reference to output delay is fixed but dependable on the routing path length from the outputs to the auxiliary
input pin. Figure 33 illustrates how the output is loopback to the Auxiliary Input in bypass mode to put the device
in fixed delay mode.
LF
REF_IN
FB
100nF
Div by 1
Div by 1
Feedback
Divider
PFD /
CP
Prescaler
Output
Divider 0
Output
Divider 1
U0P
U0N
U1P
U1N
Figure 33. CDCE62002 External Feedback Example
This function is limited by the output divider divide ratio and can be implemented when one of the outputs is set
from 10.94 MHz to 40.00MHz.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): CDCE62002
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