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CDCE62002 Datasheet, PDF (42/49 Pages) Texas Instruments – Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs | |||
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CDCE62002
SCAS882A â JUNE 2009 â REVISED JULY 2009.............................................................................................................................................................. www.ti.com
REVISION HISTORY
Changes from Original (June 2009) to Revision A ......................................................................................................... Page
⢠Added information - The input has an internal 150-k⦠pull-up resist .................................................................................... 3
⢠Deleted (as described in later future revisions of this document).......................................................................................... 3
⢠Added NOTE: All VCC pins need to be connected for the device to operate properly. ........................................................ 3
⢠Changed graphic input naming .............................................................................................................................................. 4
⢠Changed graphic input naming .............................................................................................................................................. 5
⢠Changed W to mW ................................................................................................................................................................ 8
⢠Changed W to mW ................................................................................................................................................................ 8
⢠Changed W to mW ................................................................................................................................................................ 8
⢠Changed W to mW ................................................................................................................................................................ 8
⢠Deleted underscore before IN+.............................................................................................................................................. 8
⢠Deleted 6 from 8006 ............................................................................................................................................................ 11
⢠Changed Y4 to Y1 ............................................................................................................................................................... 12
⢠Added MIN, TYP, and MAX values...................................................................................................................................... 12
⢠Added (Reg 0 RAM bit 9 = 1) .............................................................................................................................................. 14
⢠Added (Reg 0 RAM bit 9 = 0) .............................................................................................................................................. 14
⢠Changed REF into REF_IN ................................................................................................................................................. 14
⢠Changed AUX into AUX_IN ................................................................................................................................................. 14
⢠Deleted t9 from timing.......................................................................................................................................................... 16
⢠Changed input naming......................................................................................................................................................... 18
⢠Changed part number error ................................................................................................................................................. 19
⢠Changed REFERENCE to REF_IN and AUXILARY to AUX_IN ......................................................................................... 22
⢠Changed power to current ................................................................................................................................................... 22
⢠Changed 0110 to 1000 ........................................................................................................................................................ 24
⢠Changed 0001 to 0100 ........................................................................................................................................................ 25
⢠Changed description for RAM BIT to - TI Test Registers. For TI Use Only ........................................................................ 25
⢠Changed graphic.................................................................................................................................................................. 26
⢠Changed table information................................................................................................................................................... 26
⢠Changed PDDRESET to PLLRESET .................................................................................................................................. 26
⢠Changed Power_Down to PD.............................................................................................................................................. 26
⢠Changed PRI_IN to REF_IN ................................................................................................................................................ 28
⢠Changed PRI_IN to REF_IN ................................................................................................................................................ 29
⢠Added sentence - In This mode a valid frequency needs to be present on AUX_IN before the /PD is deasserted or
power is applied. .................................................................................................................................................................. 29
⢠Changed PRI_IN to REF_IN ................................................................................................................................................ 40
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