CDCE62002 Datasheet, PDF (14/49 Pages) Texas Instruments – Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62002
SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
TIMING REQUIREMENTS
over recommended ranges of supply voltage, load and operating free-air temperature range (unless otherwise noted)
PARAMETER
REF_IN REQUIREMENTS
f_{REF – Diff IN-DIV}
Maximum clock frequency applied to reference divider when (Register 0 Bit 9 = 1)
(Reg 0 RAM bit 9 = 1)
f_{REF – Diff REF_DIV}
Maximum clock frequency applied to reference divider when (Register 0 Bit 9 = 0)
(Reg 0 RAM bit 9 = 0)
f_{REF– Single}
For Single ended Inputs ( LVCMOS) on REF_IN
Duty Cycle Single Duty cycle of REF_IN at V_CC / 2
Duty Cycle Diff
Duty cycle of REF_IN at V_CC / 2
AUXILARY_IN REQUIREMENTS
f_{REF – Single}
For Single ended Inputs (LVCMOS) on AUX_IN
f_{REF – Crystal}
For Single ended Inputs (AT-Cut Crystal Input)
PD REQUIREMENTS
t_r / t_f
Rise and fall time of the PD signal from 20% to 80% of V_CC
MIN TYP MAX UNIT
40%
40%
500 MHz
250 MHz
250
60%
60%
MHz
2
75 MHz
2
42 MHz
4 ns
PHASE NOISE ANALYSIS
Table 2. Phase Noise for 30.72MHz External Reference
Phase Noise Specifications under following configuration: VCO = 1966.08 MHz, REF_IN = 30.72MHz,
PFD Frequency = 30.72MHz, Charge Pump Current = 1.5mA Loop BW = 400kHz at 3.3V and 25°C.
PHASE NOISE
AT
Reference
30.72MHz
LVPECL-HP
491.52MHz
LVPECL
491.52MHz
LVDS-HP
491.52MHz
LVDS
491.52MHz
10Hz
–108
–84
–84
–85
–85
100Hz
–130
–98
–98
–98
–97
1kHz
–134
–106
–106
–106
–106
10kHz
–152
–118
–118
–118
–118
100kHz
–156
–121
–121
–121
–121
1MHz
–157
–131
–131
–130
–130
10MHz
—
–146
–146
–146
–145
20MHz
—
–146
–146
–146
–145
Jitter(RMS)
10k~20MHz
195
(10k~20Mhz)
319
316
332.4
332.2
LVCMOS-HP
122.88MHz
–97
–110
–118
–130
–133
–143
–152
–152
366.5
LVCMOS
122.88MHz
–97
–111
–118
–130
–133
–142
–151
–151
372.1
UNIT
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
fs
Table 3. Phase Noise for 25MHz Crystal Reference
Phase Noise Specifications under following configuration: VCO = 2000.00 MHz, AUX_IN -REF = 25.00MHz,
PFD Frequency = 25.00MHz, Charge Pump Current = 1.5mA Loop BW = 400kHz 3.3V and 25°C.
Phase Noise at
Reference
25.00MHz
LVPECL-HP
500.00MHz
LVDS-HP
250.00MHz
LVCMOS-HP
125.00MHz
10Hz
—
–72
–72
–79
100Hz
—
–97
–97
–103
1kHz
—
–111
–111
–118
10kHz
—
–120
–120
–126
100kHz
—
–124
–124
–130
1MHz
—
–136
–136
–142
10MHz
—
–147
–147
–151
20MHz
—
–148
–148
–151
Jitter(RMS)
10k~20MHz
—
426
426
443
UNIT
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
fs
14
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