CDCE62002 Datasheet, PDF (38/49 Pages) Texas Instruments – Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62002
SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
Device Power Calculation and Thermal Management
The CDCE62002 is a high performance device; therefore careful attention must be paid to device configuration
and printed circuit board layout with respect to power consumption. Table 21 provides the power consumption for
the individual blocks within the CDCE62002. To estimate total power consumption, calculate the sum of the
products of the number of blocks used and the power dissipated of each corresponding block.
Table 21. CDCE62002 Power Consumption
INTERNAL BLOCK
(Power at 3.3V)
Input Circuit
PLL and VCO Core
Output Divider
Output Buffer ( LVPECL)
Output Buffer (LVDS)
Output Buffer (LVCMOS)
POWER DISSIPATED
PER BLOCK
32
333
92
150
95
62
NUMBER OF BLOCKS
PER DEVICE
1
1
2
2
2
4
This power estimate determines the degree of thermal management required for a specific design. Observing
good thermal layout practices enables the thermal pad on the backside of the QFN-32 package to provide a
good thermal path between the die contained within the package and the ambient air. This thermal pad also
serves as the ground connection the device; therefore, a low inductance connection to the ground plane is
essential.
Back Side
Component Side
QFN-32
Solder Mask
Thermal Slug
(package bottom)
No Solder Mask
Internal
Power
Plane
Thermal Vias
Figure 30. CDCE62002 Recommended PCB Layout
Internal
Ground
Plane
Thermal
Dissipation
Pad (back side)
CDCE62002 Power Supply Bypassing – Recommended Layout
Figure 31 shows a conceptual layout focusing on power supply bypass capacitor placement. If the capacitors are
mounted on the back side, 0402 components can be employed; however, soldering to the Thermal Dissipation
Pad can be difficult. If the capacitors are mounted on the component side, 0201 components must be used to
facilitate signal routing. In either case, the connections between the capacitor and the power supply terminal on
the device must be kept as short as possible.
Component & Back Side
Component Side
Only
Figure 31. CDCE62002 Power Supply Bypassing
38
Submit Documentation Feedback
Product Folder Link(s): CDCE62002
Copyright © 2009, Texas Instruments Incorporated