CD00191174 Datasheet, PDF (91/112 Pages) STMicroelectronics – High-density access line, ARM-based 32-bit MCU

STM32F101xC, STM32F101xD, STM32F101xE
Figure 46. SPI timing diagram - slave mode and CPHA=0
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tSU(NSS)
tc(SCK)
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
MOSI
I NPUT
tsu(SI)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
Figure 47. SPI timing diagram - slave mode and CPHA=1⁽¹⁾
Electrical characteristics
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14134c
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCKH)
tw(SCKL)
MISO
OUT P UT
MOSI
I NPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MS B O UT
th(SI)
M SB IN
th(SO)
BI T6 OUT
B I T1 IN
1. Measurement points are done at CMOS levels: 0.3V_DD and 0.7V_DD.
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14135
Doc ID 14610 Rev 8
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